| Message ID | 20230202145208.2328032-6-quic_kathirav@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add APSS clock driver support for IPQ5332 | expand |
On 2.02.2023 15:52, Kathiravan T wrote: > IPQ5332 has the APSS clock controller utilizing the same register space > as the APCS, so provide access to the APSS utilizing a child device like > other IPQ chipsets. > > Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 > match data for IPQ5332. > > Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > index 0e9f9cba8668..9d1f1b8671fc 100644 > --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c > +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > @@ -141,6 +141,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) > > /* .data is the offset of the ipc register within the global block */ > static const struct of_device_id qcom_apcs_ipc_of_match[] = { > + { .compatible = "qcom,ipq5332-apcs-apps-global", .data = &ipq6018_apcs_data }, > { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, > { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data }, > { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
On 02/02/2023 16:16, Konrad Dybcio wrote: > > > On 2.02.2023 15:52, Kathiravan T wrote: >> IPQ5332 has the APSS clock controller utilizing the same register space >> as the APCS, so provide access to the APSS utilizing a child device like >> other IPQ chipsets. >> >> Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 >> match data for IPQ5332. >> >> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> >> --- > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> While this is not the fault of this patch, but we keep adding compatibles with same driver data. I think this should start using fallbacks at some point... Best regards, Krzysztof
On 02/02/2023 16:30, Krzysztof Kozlowski wrote: > On 02/02/2023 16:16, Konrad Dybcio wrote: >> >> >> On 2.02.2023 15:52, Kathiravan T wrote: >>> IPQ5332 has the APSS clock controller utilizing the same register space >>> as the APCS, so provide access to the APSS utilizing a child device like >>> other IPQ chipsets. >>> >>> Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 >>> match data for IPQ5332. >>> >>> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> >>> --- >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > While this is not the fault of this patch, but we keep adding > compatibles with same driver data. I think this should start using > fallbacks at some point... I'll work on this. Best regards, Krzysztof
On 2.02.2023 16:30, Krzysztof Kozlowski wrote: > On 02/02/2023 16:16, Konrad Dybcio wrote: >> >> >> On 2.02.2023 15:52, Kathiravan T wrote: >>> IPQ5332 has the APSS clock controller utilizing the same register space >>> as the APCS, so provide access to the APSS utilizing a child device like >>> other IPQ chipsets. >>> >>> Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 >>> match data for IPQ5332. >>> >>> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> >>> --- >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > While this is not the fault of this patch, but we keep adding > compatibles with same driver data. I think this should start using > fallbacks at some point... Fair. Konrad > > Best regards, > Krzysztof >
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 0e9f9cba8668..9d1f1b8671fc 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -141,6 +141,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) /* .data is the offset of the ipc register within the global block */ static const struct of_device_id qcom_apcs_ipc_of_match[] = { + { .compatible = "qcom,ipq5332-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
IPQ5332 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like other IPQ chipsets. Like IPQ6018, the same controller and driver is used, so utilize IPQ6018 match data for IPQ5332. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 + 1 file changed, 1 insertion(+)