| Message ID | 20230213-sm6350-camcc-runtime_pm-v3-2-d35e0d833cc4@fairphone.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add pm_runtime support to SM6350 camcc | expand |
On 14/02/2023 12:01, Luca Weiss wrote: > Add the CX power domain to the camcc node so the power domain gets > marked as in-use when camcc is used. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 1e1d366c92c1..62d6dcd8d1fe 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -1507,6 +1507,8 @@ camcc: clock-controller@ad00000 { > compatible = "qcom,sm6350-camcc"; > reg = <0 0x0ad00000 0 0x16000>; > clocks = <&rpmhcc RPMH_CXO_CLK>; > + power-domains = <&rpmhpd SM6350_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; Does not look like you tested the DTS against bindings. Please run `make dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 1e1d366c92c1..62d6dcd8d1fe 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1507,6 +1507,8 @@ camcc: clock-controller@ad00000 { compatible = "qcom,sm6350-camcc"; reg = <0 0x0ad00000 0 0x16000>; clocks = <&rpmhcc RPMH_CXO_CLK>; + power-domains = <&rpmhpd SM6350_CX>; + required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>;
Add the CX power domain to the camcc node so the power domain gets marked as in-use when camcc is used. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ 1 file changed, 2 insertions(+)