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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id r3-20020a2e80c3000000b0029358afcc9esm805233ljg.34.2023.02.22.09.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 09:22:51 -0800 (PST) From: Vladimir Zapolskiy To: Krzysztof Kozlowski , Bjorn Andersson , Herbert Xu , Thara Gopinath , Bhupesh Sharma Cc: Rob Herring , Konrad Dybcio , Andy Gross , "David S. Miller" , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Rob Herring , Jordan Crouse Subject: [PATCH v11 04/10] dt-bindings: qcom-qce: Add 'iommus' to optional properties Date: Wed, 22 Feb 2023 19:22:34 +0200 Message-Id: <20230222172240.3235972-5-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20230222172240.3235972-1-vladimir.zapolskiy@linaro.org> References: <20230222172240.3235972-1-vladimir.zapolskiy@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhupesh Sharma Add the missing optional property - 'iommus' to the device-tree binding documentation for qcom-qce crypto IP. This property describes the phandle(s) to apps_smmu node with sid mask. Cc: Bjorn Andersson Reviewed-by: Rob Herring Tested-by: Jordan Crouse Signed-off-by: Bhupesh Sharma Signed-off-by: Vladimir Zapolskiy --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index 94f96ebc5dac..4e00e7925fed 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -32,6 +32,12 @@ properties: - const: bus - const: core + iommus: + minItems: 1 + maxItems: 8 + description: + phandle to apps_smmu node with sid mask. + interconnects: maxItems: 1 description: @@ -72,4 +78,8 @@ examples: clock-names = "iface", "bus", "core"; dmas = <&cryptobam 2>, <&cryptobam 3>; dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; };