| Message ID | 20230329084744.5705-9-quic_jinlmao@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Add cmb dataset support for TPDM | expand |
On 29/03/2023 10:47, Mao Jinlong wrote: > Add property "qcom,cmb-elem-size" to support CMB element for TPDM. > The associated aggregator will read this size before it is enabled. > CMB element size currently only supports 8-bit, 32-bit and 64-bit. > > Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> > --- > .../bindings/arm/qcom,coresight-tpdm.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > index 283dfb39d46f..c5169de81e58 100644 > --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml > @@ -53,6 +53,14 @@ properties: > minimum: 32 > maximum: 64 > > + qcom,cmb-element-size: s/size/bits/ https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/property-units.yaml > + description: > + Specifies the CMB (Continuous multi-bit) element size supported by > + the monitor. The associated aggregator will read this size before it > + is enabled. CMB element size currently supports 8-bit, 32-bit, 64-bit. > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [8, 32, 64] > + > qcom,dsb_msr_num: > description: > Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) > @@ -95,6 +103,12 @@ required: > - clocks > - clock-names > > +anyOf: > + - required: > + - qcom,dsb_msr_num There is no such property. > + - required: > + - qcom,cmb-msr-num Why this is part of this patch? > + > additionalProperties: false > > examples: > @@ -105,6 +119,8 @@ examples: > reg = <0x0684c000 0x1000>; > > qcom,dsb-element-size = <32>; > + qcom,cmb-element-size = <32>; > + > qcom,dsb_msr_num = <16>; > qcom,cmb-msr-num = <6>; > Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 283dfb39d46f..c5169de81e58 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -53,6 +53,14 @@ properties: minimum: 32 maximum: 64 + qcom,cmb-element-size: + description: + Specifies the CMB (Continuous multi-bit) element size supported by + the monitor. The associated aggregator will read this size before it + is enabled. CMB element size currently supports 8-bit, 32-bit, 64-bit. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 32, 64] + qcom,dsb_msr_num: description: Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) @@ -95,6 +103,12 @@ required: - clocks - clock-names +anyOf: + - required: + - qcom,dsb_msr_num + - required: + - qcom,cmb-msr-num + additionalProperties: false examples: @@ -105,6 +119,8 @@ examples: reg = <0x0684c000 0x1000>; qcom,dsb-element-size = <32>; + qcom,cmb-element-size = <32>; + qcom,dsb_msr_num = <16>; qcom,cmb-msr-num = <6>;
Add property "qcom,cmb-elem-size" to support CMB element for TPDM. The associated aggregator will read this size before it is enabled. CMB element size currently only supports 8-bit, 32-bit and 64-bit. Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> --- .../bindings/arm/qcom,coresight-tpdm.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)