From patchwork Wed Mar 29 08:47:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mao Jinlong X-Patchwork-Id: 13192115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88193C77B6C for ; Wed, 29 Mar 2023 08:49:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231319AbjC2ItB (ORCPT ); Wed, 29 Mar 2023 04:49:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230371AbjC2Ish (ORCPT ); Wed, 29 Mar 2023 04:48:37 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E5843C3B; Wed, 29 Mar 2023 01:48:29 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32SNpbU7008579; Wed, 29 Mar 2023 08:48:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=OFlfjRYANz+Cqp4MQubmPGGlSaQQl2KTHyWywJDQfNU=; b=McijSEUeV0lrgmWH7bXMe7go7pauLFxxbnmHYFKuJOeSkjcOMqyUxIzGiBhuZdr8yHdz s0IGrkVGQTGE2+R4Zhu3ZO1v2cfv56BsdxFeQv/NzxqskIccf5eT4iFleEvN6c7TfVnJ ZNI2PBIcSjU/erB6Hluvmc5wenVEpCESqYH+dJtNgsa6WgqKzvXi/lvdBGFuBsYOwhEO PqzLf7pwgFWVxrKaS6EQNhkZJ7NnWPJbuUql3YI8Q/d1ijAgbCvG7Chhot6gLSQn1GJS tkkY8d3M4pU2x/D6IVJ7CaCp/YKGAFxFGPUTnrvvQRQjZCpTnDBdO5wExvBYc64CRuG+ 2Q== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pky0xavuh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Mar 2023 08:48:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32T8lxwR023421 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Mar 2023 08:47:59 GMT Received: from hu-jinlmao-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 29 Mar 2023 01:47:58 -0700 From: Mao Jinlong To: Alexander Shishkin , Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Suzuki K Poulose , Mike Leach , Leo Yan , Rob Herring , Krzysztof Kozlowski CC: Mao Jinlong , , , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Hao Zhang Subject: [PATCH v1 8/8] dt-bindings: arm: Add support for TPDM CMB element size Date: Wed, 29 Mar 2023 01:47:44 -0700 Message-ID: <20230329084744.5705-9-quic_jinlmao@quicinc.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230329084744.5705-1-quic_jinlmao@quicinc.com> References: <20230329084744.5705-1-quic_jinlmao@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: GLsgeYYQQ4AB4XtBOcZqp0R4KauqzKhs X-Proofpoint-ORIG-GUID: GLsgeYYQQ4AB4XtBOcZqp0R4KauqzKhs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-29_02,2023-03-28_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=831 impostorscore=0 phishscore=0 mlxscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303290071 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add property "qcom,cmb-elem-size" to support CMB element for TPDM. The associated aggregator will read this size before it is enabled. CMB element size currently only supports 8-bit, 32-bit and 64-bit. Signed-off-by: Mao Jinlong --- .../bindings/arm/qcom,coresight-tpdm.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 283dfb39d46f..c5169de81e58 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -53,6 +53,14 @@ properties: minimum: 32 maximum: 64 + qcom,cmb-element-size: + description: + Specifies the CMB (Continuous multi-bit) element size supported by + the monitor. The associated aggregator will read this size before it + is enabled. CMB element size currently supports 8-bit, 32-bit, 64-bit. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 32, 64] + qcom,dsb_msr_num: description: Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) @@ -95,6 +103,12 @@ required: - clocks - clock-names +anyOf: + - required: + - qcom,dsb_msr_num + - required: + - qcom,cmb-msr-num + additionalProperties: false examples: @@ -105,6 +119,8 @@ examples: reg = <0x0684c000 0x1000>; qcom,dsb-element-size = <32>; + qcom,cmb-element-size = <32>; + qcom,dsb_msr_num = <16>; qcom,cmb-msr-num = <6>;