From patchwork Sat Apr 15 09:55:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13212413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60E4BC77B71 for ; Sat, 15 Apr 2023 10:06:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229949AbjDOKGl (ORCPT ); Sat, 15 Apr 2023 06:06:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230155AbjDOKGf (ORCPT ); Sat, 15 Apr 2023 06:06:35 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B56E83C2; Sat, 15 Apr 2023 03:06:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1C1E160B7A; Sat, 15 Apr 2023 10:06:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A277DC43444; Sat, 15 Apr 2023 10:06:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681553183; bh=j0aBz66SH19AvtQqR7Wm6Ds/FEdfxHpyVN3OSq/97ic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wnb6lo7ozMMC+0h+H3aHtR73fgbRh+c1fxAOUu/duhI+c/RZPDt+thU1gS8iYN437 4xwKW5j54WgNmgpB46qD7PvQQ77aFl+X4XqFS5hBVXjfWB3hl8ElMn+2wWUVVA7bhW X2g6QLLhsl5w+8BRrkdt/0x7p7W3eVUUh6c06h3IE2Piuiy0xsVZ1+lTXvzIcns2q+ fel9D5AIU6F1SbXSnGMX3evpMmfZ2jWuiY4TTbKYd8MqqRMFIqLAQ63LhHEoLmdbKL RPbBsV0Rqu4+TndBK4FcxdwmrmNsAxdxim9AHje8usVbPN+f4VJ9nVo1Mzn1CG33K8 +8+BAvAGiaq1Q== From: Jisheng Zhang To: Lars-Peter Clausen , Vinod Koul , Eugeniy Paltsev , Logan Gunthorpe , Sinan Kaya , Andy Gross , Bjorn Andersson , Konrad Dybcio , Orson Zhai , Baolin Wang , Chunyan Zhang Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 3/5] dmaengine: plx_dma: Don't set chancnt Date: Sat, 15 Apr 2023 17:55:15 +0800 Message-Id: <20230415095517.2763-4-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230415095517.2763-1-jszhang@kernel.org> References: <20230415095517.2763-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The dma framework will calculate the dma channels chancnt, setting it ourself is wrong. Signed-off-by: Jisheng Zhang Acked-by: Logan Gunthorpe --- drivers/dma/plx_dma.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/dma/plx_dma.c b/drivers/dma/plx_dma.c index 12725fa1655f..34b6416c3287 100644 --- a/drivers/dma/plx_dma.c +++ b/drivers/dma/plx_dma.c @@ -517,7 +517,6 @@ static int plx_dma_create(struct pci_dev *pdev) plxdev->bar = pcim_iomap_table(pdev)[0]; dma = &plxdev->dma_dev; - dma->chancnt = 1; INIT_LIST_HEAD(&dma->channels); dma_cap_set(DMA_MEMCPY, dma->cap_mask); dma->copy_align = DMAENGINE_ALIGN_1_BYTE;