From patchwork Mon Apr 17 08:21:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 13213441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25861C77B7D for ; Mon, 17 Apr 2023 08:23:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231175AbjDQIXr (ORCPT ); Mon, 17 Apr 2023 04:23:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230375AbjDQIXm (ORCPT ); Mon, 17 Apr 2023 04:23:42 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5797A55A7; Mon, 17 Apr 2023 01:23:09 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33H41abM021159; Mon, 17 Apr 2023 08:23:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=MmOOZa0wwQbtadZSrZGHPeffz7xcdPREluDFNCb9zi0=; b=Se5TCw1cn859lBYtx7gnNSR5Zd3a3s6Okqx/uAF2MNV/tZEQ8BIAP0iHrx+SvYfpnXm7 IsuTJNgLxQtlFcayApZwIGIq/pDegVQK8FRV/4Eo/tvKN/GlkTHY5jwPbFMEUw3Lu7Xk qFN3wAtaQ7tgftplVeAXUlOe1y/aV7aJgb10i/bvH/Xgui64NTr5Lt0XsO8yK9kUK239 dv1ltrO+IbjDxJRZTuDvSgT2IXlucF07kB6BW4iNeEfc1QHIJh77h37rLv4lG7SGcpn1 8+bsWgOnagy+Qbcd5SYFSg/qaia7iLX2Bwndg8nFrC6w0AURjvOKGJUwAhx9EfDkELlT 2w== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pymqmtx97-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Apr 2023 08:23:06 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33H8N5Wr024522 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Apr 2023 08:23:05 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Mon, 17 Apr 2023 01:23:01 -0700 From: Taniya Das To: Stephen Boyd , Rob Herring , "Bjorn Andersson" , Andy Gross , "Krzysztof Kozlowski" CC: , , , , , , , Taniya Das Subject: [PATCH V2 3/3] arm64: dts: qcom: sm8450: Add video clock controller Date: Mon, 17 Apr 2023 13:51:27 +0530 Message-ID: <20230417082127.11681-4-quic_tdas@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230417082127.11681-1-quic_tdas@quicinc.com> References: <20230417082127.11681-1-quic_tdas@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: EusM-uAA01ZUD0GxnyKM5v2RCpRIf9-l X-Proofpoint-ORIG-GUID: EusM-uAA01ZUD0GxnyKM5v2RCpRIf9-l X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-17_04,2023-04-14_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 phishscore=0 spamscore=0 bulkscore=0 mlxlogscore=860 adultscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304170074 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device node for video clock controller on Qualcomm SM8450 platform. Signed-off-by: Taniya Das --- Changes since V1: - No changes. arch/arm64/boot/dts/qcom/sm8450.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 31877f18dce2..863a39000630 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -760,6 +760,19 @@ gcc: clock-controller@100000 { "usb3_phy_wrapper_gcc_usb30_pipe_clk"; }; + videocc: clock-controller@aaf0000 { + compatible = "qcom,sm8450-videocc"; + reg = <0 0x0aaf0000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo", "iface"; + power-domains = <&rpmhpd SM8450_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + gpi_dma2: dma-controller@800000 { compatible = "qcom,sm8450-gpi-dma", "qcom,sm6350-gpi-dma"; #dma-cells = <3>;