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[213.36.7.13]) by smtp.gmail.com with ESMTPSA id m22-20020a7bcb96000000b003f17131952fsm2388519wmi.29.2023.04.19.07.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 07:41:57 -0700 (PDT) From: Arnaud Vrac Date: Wed, 19 Apr 2023 16:41:09 +0200 Subject: [PATCH 02/11] drm/msm/dpu: use the actual lm maximum width instead of a hardcoded value MIME-Version: 1.0 Message-Id: <20230419-dpu-tweaks-v1-2-d1bac46db075@freebox.fr> References: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> In-Reply-To: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Arnaud Vrac X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1453; i=avrac@freebox.fr; h=from:subject:message-id; bh=F1W/wchYMCu2VjLqHH6U+LrWUMc7lJp207y9YaxngyM=; b=owEBbQKS/ZANAwAIAXED/9m7NDSrAcsmYgBkP/2YRHSjxXabDh0Gu+NKzHbr/LV2esVhNCjWe gUDIZ3V20WJAjMEAAEIAB0WIQSUwb/ndwkXHdZ/QQZxA//ZuzQ0qwUCZD/9mAAKCRBxA//ZuzQ0 q9tYD/9LxTx1cpzUZKY3M7CrNX2Jf6IGVMYxyJqcOvjHmPaMEElWxCjSZ2oY2ZbE+F1S6z5JPsq P9UgmupIvqwIEvcsVnhcvW1wXyfcPH8xyZ8kRhW4LQIfS3VW/ySRdNndBtPtjVVRFJzvOiZHDVd MWcdkols1Sb8bAPlDeuXffjYMWYkzgqcDzJk7Iq5FerkvkQt91s18X7Mht3pKgvlak4SdMYXKpc kE5ULRYhNvt8XbKAUPTDDLMZo4XrsGo+fua4M8AXfPp0du/QMqlP7SxL6NadQfsINl5RuQUlmyq 0lf64+UUU2Als0GNKEvEAmy4sv8iQBv0rru0jzDW5jlw/aarbONgpxYDcIcQHoesDAOTa4WA6dO OiDqWXskg/QCG7LYfo9JSg0S9ohG6dC+sE+bypkM+TqNLcobWOVObLs6dYOhMBGhxD0SW0HCLC5 hIjiQVeoupzgYXhjJeLJjEZtiwsTx0OPxXL67WzZ4Tfs7UzTOi0XVVqa4kl3K8xXp3Ybj3xCPPf Q+ToaLhrxKsyuA8VeXC2yCWM7d5o5tfG6oohLDoqeXB2Jd5nj8Oo8jWeoUDUfG+bGliN+CXIkF1 XM2LKRVo2Hl1KwyNWNHGUsnlUE7mPmB2QoZREpw7VhwsTDdvAWMpV3ZKTJkXkuH6Ir/ouEFm/oE 3txKrd1uS68t15g== X-Developer-Key: i=avrac@freebox.fr; a=openpgp; fpr=6225092072BB58E3CEEC091E75392A176D952DB4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This avoids using two LMs instead of one when the display width is lower than the maximum supported value. For example on MSM8996/MSM8998, the actual maxwidth is 2560, so we would use two LMs for 1280x720 or 1920x1080 resolutions, while one is enough. Signed-off-by: Arnaud Vrac --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1dc5dbe585723..dd2914726c4f6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -53,8 +53,6 @@ #define IDLE_SHORT_TIMEOUT 1 -#define MAX_HDISPLAY_SPLIT 1080 - /* timeout in frames waiting for frame done */ #define DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES 5 @@ -568,10 +566,12 @@ static struct msm_display_topology dpu_encoder_get_topology( */ if (intf_count == 2) topology.num_lm = 2; - else if (!dpu_kms->catalog->caps->has_3d_merge) - topology.num_lm = 1; + else if (dpu_kms->catalog->caps->has_3d_merge && + dpu_kms->catalog->mixer_count > 0 && + mode->hdisplay > dpu_kms->catalog->mixer[0].sblk->maxwidth) + topology.num_lm = 2; else - topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; + topology.num_lm = 1; if (crtc_state->ctm) topology.num_dspp = topology.num_lm;