| Message ID | 20230426192246.5517-2-quic_abhinavk@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/4] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush | expand |
On 26/04/2023 22:22, Abhinav Kumar wrote: > Inverse gamma correction blocks (IGC) are not used today so lets > remove the usage of DPU_DSPP_IGC in the dspp flush to make it easier > to remove IGC from the catalog. > > We can add this back when IGC is properly supported in DPU with > one of the standard DRM properties. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
DSPP* On 2023-04-26 12:22:44, Abhinav Kumar wrote: > Inverse gamma correction blocks (IGC) are not used today so lets > remove the usage of DPU_DSPP_IGC in the dspp flush to make it easier DSPP* > to remove IGC from the catalog. > > We can add this back when IGC is properly supported in DPU with > one of the standard DRM properties. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > index 57adaebab563..b2a1f83ac72c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > @@ -330,9 +330,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( > return; > > switch (dspp_sub_blk) { > - case DPU_DSPP_IGC: > - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(2); > - break; > case DPU_DSPP_PCC: > ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); > break; > -- > 2.40.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 57adaebab563..b2a1f83ac72c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -330,9 +330,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( return; switch (dspp_sub_blk) { - case DPU_DSPP_IGC: - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(2); - break; case DPU_DSPP_PCC: ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); break;
Inverse gamma correction blocks (IGC) are not used today so lets remove the usage of DPU_DSPP_IGC in the dspp flush to make it easier to remove IGC from the catalog. We can add this back when IGC is properly supported in DPU with one of the standard DRM properties. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- 1 file changed, 3 deletions(-)