Message ID | 20230526070421.25406-4-quic_kathirav@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Add QFPROM support for few IPQ SoCs | expand |
On 26.05.2023 09:04, Kathiravan T wrote: > IPQ6018 has efuse region to determine the various HW quirks. Lets > add the initial support and the individual fuses will be added as they > are required. > > Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index f531797f2619..856879fd0207 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -206,6 +206,13 @@ > dma-ranges; > compatible = "simple-bus"; > > + qfprom: efuse@a4000 { This should be a bit lower down (0xa4000 > 0x59000) Konrad > + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; > + reg = <0x0 0x000a4000 0x0 0x2000>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > qusb_phy_1: qusb@59000 { > compatible = "qcom,ipq6018-qusb2-phy"; > reg = <0x0 0x00059000 0x0 0x180>;
On 5/26/2023 2:54 PM, Konrad Dybcio wrote: > > On 26.05.2023 09:04, Kathiravan T wrote: >> IPQ6018 has efuse region to determine the various HW quirks. Lets >> add the initial support and the individual fuses will be added as they >> are required. >> >> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> index f531797f2619..856879fd0207 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> @@ -206,6 +206,13 @@ >> dma-ranges; >> compatible = "simple-bus"; >> >> + qfprom: efuse@a4000 { > This should be a bit lower down (0xa4000 > 0x59000) Sorry, missed this. Will address in V2. > > Konrad >> + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; >> + reg = <0x0 0x000a4000 0x0 0x2000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; >> + >> qusb_phy_1: qusb@59000 { >> compatible = "qcom,ipq6018-qusb2-phy"; >> reg = <0x0 0x00059000 0x0 0x180>;
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index f531797f2619..856879fd0207 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -206,6 +206,13 @@ dma-ranges; compatible = "simple-bus"; + qfprom: efuse@a4000 { + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; + reg = <0x0 0x000a4000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + }; + qusb_phy_1: qusb@59000 { compatible = "qcom,ipq6018-qusb2-phy"; reg = <0x0 0x00059000 0x0 0x180>;
IPQ6018 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)