| Message ID | 20230623141806.13388-3-quic_kbajaj@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | soc: qcom: llcc: Add support for QDU1000/QRU1000 | expand |
On 23/06/2023 16:18, Komal Bajaj wrote: > Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional > nvmem-cells and nvmem-cell-names property. Your commit should explain why you are doing this. I can easily see from the diff that you add nvmem-cells. But why? > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- > Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 44892aa589fd..580f9a97ddf7 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,qdu1000-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -44,6 +45,14 @@ properties: interrupts: maxItems: 1 + nvmem-cells: + items: + - description: Reference to an nvmem node for multi channel DDR + + nvmem-cell-names: + items: + - const: multi-chan-ddr + required: - compatible - reg @@ -92,6 +101,7 @@ allOf: compatible: contains: enum: + - qcom,qdu1000-llcc - qcom,sc8180x-llcc - qcom,sc8280xp-llcc then:
Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional nvmem-cells and nvmem-cell-names property. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+)