Message ID | 20230712103213.101770-4-manivannan.sadhasivam@linaro.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | UFS: Add OPP and interconnect support | expand |
On 12.07.2023 12:31, Manivannan Sadhasivam wrote: > GCC and it's GDSCs are under the RPMh CX power domain. So let's add the > missing RPMh power domain to the GCC node. > > Fixes: 6d4cf750d03a ("arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP") > Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- The ratio of developers to lines of code changed is sus, but okay Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 02a6ea0b8b2c..9ed74bf72d05 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -1207,6 +1207,7 @@ gcc: clock-controller@100000 { > #clock-cells = <1>; > #reset-cells = <1>; > #power-domain-cells = <1>; > + power-domains = <&rpmhpd SDM845_CX>; > }; > > qfprom@784000 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 02a6ea0b8b2c..9ed74bf72d05 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1207,6 +1207,7 @@ gcc: clock-controller@100000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + power-domains = <&rpmhpd SDM845_CX>; }; qfprom@784000 {