@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
+#include <linux/nvmem-consumer.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
@@ -999,6 +1000,26 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev,
return ret;
}
+static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
+{
+ int ret;
+
+ ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
+ if (ret == -ENOENT || ret == -EOPNOTSUPP) {
+ if (num_config != DEFAULT_CONFIG) {
+ ret = -EINVAL;
+ return ret;
+ }
+ *cfg_index = DEFAULT_CONFIG - 1;
+ return 0;
+ }
+
+ if (!ret && *cfg_index >= num_config)
+ ret = -EINVAL;
+
+ return ret;
+}
+
static int qcom_llcc_remove(struct platform_device *pdev)
{
/* Set the global pointer to a error code to avoid referencing it */
@@ -1035,6 +1056,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
const struct qcom_llcc_config *cfg;
const struct llcc_slice_config *llcc_cfg;
u32 sz;
+ u8 cfg_index;
u32 version;
struct regmap *regmap;
@@ -1052,11 +1074,11 @@ static int qcom_llcc_probe(struct platform_device *pdev)
}
cfgs = of_device_get_match_data(&pdev->dev);
- if (cfgs->num_config != DEFAULT_CONFIG) {
- ret = -EINVAL;
+ ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
+ if (ret)
goto err;
- }
- cfg = &cfgs->llcc_config[DEFAULT_CONFIG - 1];
+
+ cfg = &cfgs->llcc_config[cfg_index];
ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
if (ret)
Add LLCC support for multi channel DDR configuration based on a feature register. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> --- drivers/soc/qcom/llcc-qcom.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) -- 2.41.0