From patchwork Thu Aug 10 06:11:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13348780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AABEC04A94 for ; Thu, 10 Aug 2023 06:12:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233410AbjHJGMP (ORCPT ); Thu, 10 Aug 2023 02:12:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233386AbjHJGMM (ORCPT ); Thu, 10 Aug 2023 02:12:12 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64F881704; Wed, 9 Aug 2023 23:12:11 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37A5mWjd015495; Thu, 10 Aug 2023 06:12:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=yQraFZLceyDLNtwoD79g6otydNPhFws0Uc28A8hi9co=; b=jUN70+pxRe1hgcpY1tnRpZmoyOf3bhBuGW57Y/J38Wq3GnelPPP2OfjRHyXp8P2iiiCS C9YSqQphEIgGAfCDhE75hboWIrBiiBoefL0d3DwpTxyllmPVjIo1G92hLwZToOBX1RQk s9g/2rW+/slPY0l0SUVplwmrV7gwOYPUQSfxfGIo5iG1jFPR1mz5q2U7Bbv/N7GP1H8c mhuwEE3nAd+m6WEVtXBMe1n78A4F8FdP0aKbKoyNfC4zTcOIiOEB4lXoeNX3l4cNngpY FiU8EY1boHJdeba+ewZvIr4hY1lXwcwJg6/uhDEwCUFVOP/xAlg8crh9/LKYqvBjlpAq hA== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3scbcghp4d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Aug 2023 06:12:07 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37A6C6qf020929 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Aug 2023 06:12:06 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Wed, 9 Aug 2023 23:12:02 -0700 From: Komal Bajaj To: , , , , , , CC: , , , Komal Bajaj , Krzysztof Kozlowski Subject: [PATCH 1/6] dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000 Date: Thu, 10 Aug 2023 11:41:35 +0530 Message-ID: <20230810061140.15608-2-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230810061140.15608-1-quic_kbajaj@quicinc.com> References: <20230810061140.15608-1-quic_kbajaj@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6FvIA9OWJPtRg4KawGfcFsX0L51Nx8M8 X-Proofpoint-ORIG-GUID: 6FvIA9OWJPtRg4KawGfcFsX0L51Nx8M8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_04,2023-08-09_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 adultscore=0 phishscore=0 mlxlogscore=937 mlxscore=0 spamscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 clxscore=1015 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308100051 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional nvmem-cells and nvmem-cell-names properties to support multiple configurations for multi channel DDR. Signed-off-by: Komal Bajaj Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.41.0 diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 44892aa589fd..580f9a97ddf7 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,qdu1000-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -44,6 +45,14 @@ properties: interrupts: maxItems: 1 + nvmem-cells: + items: + - description: Reference to an nvmem node for multi channel DDR + + nvmem-cell-names: + items: + - const: multi-chan-ddr + required: - compatible - reg @@ -92,6 +101,7 @@ allOf: compatible: contains: enum: + - qcom,qdu1000-llcc - qcom,sc8180x-llcc - qcom,sc8280xp-llcc then: