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[83.30.49.150]) by smtp.gmail.com with ESMTPSA id w3-20020ac24423000000b004fe2f085d5csm1087289lfl.299.2023.08.12.04.27.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Aug 2023 04:27:07 -0700 (PDT) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , AngeloGioacchino Del Regno , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/7] clk: qcom: clk-hfpll: Configure l_val in init when required Date: Sat, 12 Aug 2023 13:24:45 +0200 Message-Id: <20230812112534.8610-3-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230812112534.8610-1-a39.skl@gmail.com> References: <20230812112534.8610-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for pre-configuring default frequency multiplier, this appears to be required on some platforms like MSM8976. Without configuring L_VAL device reboots when trying to bring PLL up. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/clk-hfpll.c | 4 ++++ drivers/clk/qcom/clk-hfpll.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c index 86f728dc69e5..705352aff067 100644 --- a/drivers/clk/qcom/clk-hfpll.c +++ b/drivers/clk/qcom/clk-hfpll.c @@ -44,6 +44,10 @@ static void __clk_hfpll_init_once(struct clk_hw *hw) regmap_write(regmap, hd->user_reg, regval); } + /* Write L_VAL from conf if it exist */ + if (hd->l_val) + regmap_write(regmap, hd->l_reg, hd->l_val); + if (hd->droop_reg) regmap_write(regmap, hd->droop_reg, hd->droop_val); diff --git a/drivers/clk/qcom/clk-hfpll.h b/drivers/clk/qcom/clk-hfpll.h index 2a57b2fb2f2f..27b9effcb3fd 100644 --- a/drivers/clk/qcom/clk-hfpll.h +++ b/drivers/clk/qcom/clk-hfpll.h @@ -18,6 +18,7 @@ struct hfpll_data { u32 status_reg; u8 lock_bit; + u32 l_val; u32 droop_val; u32 config_val; u32 user_val;