| Message ID | 20230830224910.8091-3-quic_abhinavk@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [01/16] drm/msm/dpu: fix writeback programming for YUV cases | expand |
On Thu, 31 Aug 2023 at 01:49, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: > > In preparation of adding more formats to dpu writeback add I think it is `preparation to' Other than that: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > format validation to it to fail any unsupported formats. > > Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c > index 284a88060221..6a1f8e34f18a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c > @@ -238,6 +238,7 @@ static int dpu_encoder_phys_wb_atomic_check( > { > struct drm_framebuffer *fb; > const struct drm_display_mode *mode = &crtc_state->mode; > + int ret; > > DPU_DEBUG("[atomic_check:%d, \"%s\",%d,%d]\n", > phys_enc->hw_wb->idx, mode->name, mode->hdisplay, mode->vdisplay); > @@ -274,6 +275,12 @@ static int dpu_encoder_phys_wb_atomic_check( > return -EINVAL; > } > > + ret = drm_atomic_helper_check_wb_encoder_state(phys_enc->parent, conn_state); > + if (ret < 0) { > + DPU_ERROR("invalid pixel format %p4cc\n", &fb->format->format); > + return ret; > + } > + > return 0; > } > > -- > 2.40.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c index 284a88060221..6a1f8e34f18a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -238,6 +238,7 @@ static int dpu_encoder_phys_wb_atomic_check( { struct drm_framebuffer *fb; const struct drm_display_mode *mode = &crtc_state->mode; + int ret; DPU_DEBUG("[atomic_check:%d, \"%s\",%d,%d]\n", phys_enc->hw_wb->idx, mode->name, mode->hdisplay, mode->vdisplay); @@ -274,6 +275,12 @@ static int dpu_encoder_phys_wb_atomic_check( return -EINVAL; } + ret = drm_atomic_helper_check_wb_encoder_state(phys_enc->parent, conn_state); + if (ret < 0) { + DPU_ERROR("invalid pixel format %p4cc\n", &fb->format->format); + return ret; + } + return 0; }
In preparation of adding more formats to dpu writeback add format validation to it to fail any unsupported formats. Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 7 +++++++ 1 file changed, 7 insertions(+)