| Message ID | 20231017131851.8299-6-quic_kriskura@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Enable runtime suspend resume for QCOM devices | expand |
On 17/10/2023 15:18, Krishna Kurapati wrote: > Add Pmic Glink support for sm8450-qrd to facilitate passing > of roe switch notifications generated by ADSP to dwc3 core > via ucsi and pmic glink's. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Please use subject prefixes matching the subsystem. You can get them for example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your patch is touching. > --- > arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 46 ++++++++++++++++++++++++- > 1 file changed, 45 insertions(+), 1 deletion(-) > With subject fixes: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 10/17/23 15:18, Krishna Kurapati wrote: > Add Pmic Glink support for sm8450-qrd to facilitate passing > of roe switch notifications generated by ADSP to dwc3 core > via ucsi and pmic glink's. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > --- No phy+redriver+dp configuration? Konrad
On 10/27/2023 1:11 AM, Konrad Dybcio wrote: > > > On 10/17/23 15:18, Krishna Kurapati wrote: >> Add Pmic Glink support for sm8450-qrd to facilitate passing >> of roe switch notifications generated by ADSP to dwc3 core >> via ucsi and pmic glink's. >> >> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> >> --- > No phy+redriver+dp configuration? > Hi Konrad, Did you mean adding the following node: typec-mux@42 { compatible = "fcs,fsa4480"; reg = <0x42>; interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; vcc-supply = <&vreg_bob>; mode-switch; orientation-switch; port { fsa4480_sbu_mux: endpoint { remote-endpoint = <&pmic_glink_sbu>; }; }; }; and then adding port-2 for pmic_glink ? Usually for role-switch the port-0/1 defined in this patch are sufficient. Also if I added it, I don't have a way to currently test it. So skipped this node. I will try and see if I can test it and add it if possible. Regards, Krishna,
diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts index fb800d24b00b..aec47e45284e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts @@ -27,6 +27,40 @@ chosen { stdout-path = "serial0:115200n8"; }; + pmic-glink { + compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; + }; + }; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -453,7 +487,17 @@ &ufs_mem_phy { &usb_1 { status = "okay"; - dr_mode = "peripheral"; + + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&pmic_glink_ss_in>; }; &usb_1_hsphy {
Add Pmic Glink support for sm8450-qrd to facilitate passing of roe switch notifications generated by ADSP to dwc3 core via ucsi and pmic glink's. Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> --- arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 46 ++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-)