From patchwork Thu Nov 16 09:35:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 13457730 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Vwgicq95" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1F3C1AE; Thu, 16 Nov 2023 01:35:45 -0800 (PST) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AG99Hc1031612; Thu, 16 Nov 2023 09:35:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=qcppdkim1; bh=EoQn+q6rg0RwGp4xp//cNCMN+zJ29hCfksNY/LzWtVM=; b=Vwgicq95Unvnatnx+KUHv6dQH5dKr+9d5CjvdT1mvQILOjn4xMa5Dkn4K++QKX9EAnlK /ZoeXBvsAot8O+RZ1KwToFOgFLIln7YKmE7oj3JeRAKzrDPMusD3fR5JC7v7kBZAq5LY aidlEQzP7uLGgpeBR3SXlWs5dpmWlS/XCkUKfchZ2v1hLDXGIKISVl/8HahdkxrCtPUx O2/pDJP958Dmo+YOu3ReLLsuUO8BHmA9Zdb7wCk710uRiMZ6IMJrmbKEXcxNWO/p0eYA AR98lClUF0kNXf00Um9+K9q/cP9cbQt2HZ6LCaZT07xdvr/+qivmqEv7BIAg8GfQdddL ww== Received: from apblrppmta01.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3udeww87jn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 09:35:24 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3AG9ZKdJ029235; Thu, 16 Nov 2023 09:35:21 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3ua2pmgd8f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 09:35:20 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3AG9ZKqA029226; Thu, 16 Nov 2023 09:35:20 GMT Received: from hu-devc-hyd-u20-c-new.qualcomm.com (hu-rohiagar-hyd.qualcomm.com [10.147.246.70]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3AG9ZKdA029207 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Nov 2023 09:35:20 +0000 Received: by hu-devc-hyd-u20-c-new.qualcomm.com (Postfix, from userid 3970568) id 2AD5022104; Thu, 16 Nov 2023 15:05:19 +0530 (+0530) From: Rohit Agarwal To: catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, geert+renesas@glider.be, konrad.dybcio@linaro.org, arnd@arndb.de, krzysztof.kozlowski@linaro.org, neil.armstrong@linaro.org, dmitry.baryshkov@linaro.org, nfraprado@collabora.com, m.szyprowski@samsung.com, u-kumar1@ti.com, peng.fan@nxp.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, kernel@quicinc.com, Rohit Agarwal Subject: [PATCH v2 3/3] arm64: defconfig: Enable Interconnect for SDX75 Date: Thu, 16 Nov 2023 15:05:13 +0530 Message-Id: <20231116093513.14259-4-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231116093513.14259-1-quic_rohiagar@quicinc.com> References: <20231116093513.14259-1-quic_rohiagar@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2xeHW440Pcgl60yRRivW0I5JiypCxRJC X-Proofpoint-GUID: 2xeHW440Pcgl60yRRivW0I5JiypCxRJC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-16_07,2023-11-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 adultscore=0 mlxlogscore=495 phishscore=0 clxscore=1015 impostorscore=0 bulkscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311160076 Enable the interconnect framework support for Qualcomm's SDX75 SoC which is required to boot to console on sdx75-idp board. Signed-off-by: Rohit Agarwal --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index eeb2ab3a7dec..4c0cd428d073 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1521,6 +1521,7 @@ CONFIG_INTERCONNECT_QCOM_SC7280=y CONFIG_INTERCONNECT_QCOM_SC8180X=y CONFIG_INTERCONNECT_QCOM_SC8280XP=y CONFIG_INTERCONNECT_QCOM_SDM845=y +CONFIG_INTERCONNECT_QCOM_SDX75=y CONFIG_INTERCONNECT_QCOM_SM8150=m CONFIG_INTERCONNECT_QCOM_SM8250=m CONFIG_INTERCONNECT_QCOM_SM8350=m