From patchwork Mon Nov 20 13:21:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 13461296 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="BrwAdicZ" Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2579BD45 for ; Mon, 20 Nov 2023 05:21:35 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-408425c7c10so15958855e9.0 for ; Mon, 20 Nov 2023 05:21:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1700486493; x=1701091293; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W4078kP/f/V2Gky4lpqf6UFEH3ZYOdfKZS8n60prFLY=; b=BrwAdicZDi7QykoENutfcGs/CCA0+/YW0oC7LmKTtooHoqrpTuK8Q3W2ClCZ8BvU3z +WmojYXlZ/gNxJaB6xIOwSjPyr+JWIECbP4n15DDydQj4NUhwbTqOtKbrDTBN0xlPjkb LV+GqKkZzf1If4xW5pW7UIFLPFfpsX2OI/OIO5qLL5lj5zL49Urm/rpBEms6ypWmrgVm 0TMo3amL66x2miq3jjY5qbjsuJmumwFwWW0uCXs727dj0JypQhjLnF6WwPlpVMV4OGn4 hSoO8Ar4CtfL/kMMyAR45s89t02FWobFzHXPFA7c7RJPLnjw4qRGbO8YD5gsrqyO9J3J Jc5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700486493; x=1701091293; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W4078kP/f/V2Gky4lpqf6UFEH3ZYOdfKZS8n60prFLY=; b=sZ/qWvVj8cMnRoLP8CO+fg01u1WOHS7VefCbio5UAo6t/7Hd4WoHeLgkV0KQ9W9x7O 0KqTAAfQ61cRHveoweKxdQXEcRjcqU7Z171BqRboiGTK8Sdfz0INRCkY2amSSMD+K9EU u10AWcWlU3n/2Be1vyaEn8wdijY6lxR4YA7bOLEq+MHIje030q5b7dMiQUbsXHqqmTcR 4OB2NpiK8Ah5RMd5ydf+b7e0p271eqvH1NnLa2AQCAyfAwQppvFypZJYbA7ysudshg3x tC0qJR+H6l9pj0wgE0r0Ug5K6F4np6sXHCU7XTZBFYurwPepp+O5JiRlgOu5DF0fphHt uyng== X-Gm-Message-State: AOJu0YwNQGqopeAGKvFGgz0STj4gD4uTixM957AeTR+NSg6hd+epS5cL xM+Nr/TaFnkBX2F1JRBfL+5zOAqWTPQSpWYJVlI= X-Google-Smtp-Source: AGHT+IEW9+oYZLDFKZ4C93QxdzjhcY7Ub/vzYo+YP+VKq3+5Wkwc1YMOfcagUXkV9ajOJNBCfP72MQ== X-Received: by 2002:a05:600c:45d0:b0:408:41b4:7fe5 with SMTP id s16-20020a05600c45d000b0040841b47fe5mr6639859wmo.16.1700486493295; Mon, 20 Nov 2023 05:21:33 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:c590:a7ce:883:eba3]) by smtp.gmail.com with ESMTPSA id k18-20020a05600c0b5200b004065e235417sm17329192wmr.21.2023.11.20.05.21.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Nov 2023 05:21:32 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 09/12] firmware: qcom: scm: add support for SHM bridge operations Date: Mon, 20 Nov 2023 14:21:15 +0100 Message-Id: <20231120132118.30473-10-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski Add low-level primitives for enabling SHM bridge support as well as creating and destroying SHM bridge pools to qcom-scm. Signed-off-by: Bartosz Golaszewski Acked-by: Andrew Halaney Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm.c | 60 ++++++++++++++++++++++++++ drivers/firmware/qcom/qcom_scm.h | 3 ++ include/linux/firmware/qcom/qcom_scm.h | 6 +++ 3 files changed, 69 insertions(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 318d7d398e5f..839773270a21 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1323,6 +1323,66 @@ bool qcom_scm_lmh_dcvsh_available(void) } EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available); +int qcom_scm_shm_bridge_enable(void) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE, + .owner = ARM_SMCCC_OWNER_SIP + }; + + struct qcom_scm_res res; + + if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP, + QCOM_SCM_MP_SHM_BRIDGE_ENABLE)) + return -EOPNOTSUPP; + + return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0]; +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable); + +int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, + u64 ipfn_and_s_perm_flags, u64 size_and_flags, + u64 ns_vmids, u64 *handle) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_CREATE, + .owner = ARM_SMCCC_OWNER_SIP, + .args[0] = pfn_and_ns_perm_flags, + .args[1] = ipfn_and_s_perm_flags, + .args[2] = size_and_flags, + .args[3] = ns_vmids, + .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL, + QCOM_SCM_VAL, QCOM_SCM_VAL), + }; + + struct qcom_scm_res res; + int ret; + + ret = qcom_scm_call(__scm->dev, &desc, &res); + + if (handle && !ret) + *handle = res.result[1]; + + return ret ?: res.result[0]; +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create); + +int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_DELETE, + .owner = ARM_SMCCC_OWNER_SIP, + .args[0] = handle, + .arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL), + }; + + return qcom_scm_call(__scm->dev, &desc, NULL); +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_delete); + int qcom_scm_lmh_profile_change(u32 profile_id) { struct qcom_scm_desc desc = { diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h index aa7d06939f8e..cb7273aa0a5e 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -116,6 +116,9 @@ struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void); #define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE 0x05 #define QCOM_SCM_MP_VIDEO_VAR 0x08 #define QCOM_SCM_MP_ASSIGN 0x16 +#define QCOM_SCM_MP_SHM_BRIDGE_ENABLE 0x1c +#define QCOM_SCM_MP_SHM_BRIDGE_DELETE 0x1d +#define QCOM_SCM_MP_SHM_BRIDGE_CREATE 0x1e #define QCOM_SCM_SVC_OCMEM 0x0f #define QCOM_SCM_OCMEM_LOCK_CMD 0x01 diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index ccaf28846054..9b6054813f59 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -115,6 +115,12 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, int qcom_scm_lmh_profile_change(u32 profile_id); bool qcom_scm_lmh_dcvsh_available(void); +int qcom_scm_shm_bridge_enable(void); +int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, + u64 ipfn_and_s_perm_flags, u64 size_and_flags, + u64 ns_vmids, u64 *handle); +int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle); + #ifdef CONFIG_QCOM_QSEECOM int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id);