Message ID | 20231206135540.17068-4-manivannan.sadhasivam@linaro.org (mailing list archive) |
---|---|
State | Accepted |
Commit | 809ec4c5a5ab8ac080adbd9624d0040850725acc |
Headers | show |
Series | Qcom PCIe DTS fixes | expand |
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index d73fc3983709..8ba6785038fa 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2409,7 +2409,7 @@ arch_timer: timer { <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; - pcie0: pcie@1c00000{ + pcie0: pcie@1c00000 { compatible = "qcom,pcie-sa8775p"; reg = <0x0 0x01c00000 0x0 0x3000>, <0x0 0x40000000 0x0 0xf20>, @@ -2509,7 +2509,7 @@ pcie0_phy: phy@1c04000 { status = "disabled"; }; - pcie1: pcie@1c10000{ + pcie1: pcie@1c10000 { compatible = "qcom,pcie-sa8775p"; reg = <0x0 0x01c10000 0x0 0x3000>, <0x0 0x60000000 0x0 0xf20>,
Add missing space between node name and braces to match the style. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)