| Message ID | 20231211172411.141289-1-manivannan.sadhasivam@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | cc6fc55c7ae04ab19b3972f78d3a8b1be32bf533 |
| Headers | show |
| Series | ARM: dts: qcom-sdx55: Fix the base address of PCIe PHY | expand |
On 11.12.2023 18:24, Manivannan Sadhasivam wrote: > While convering the binding to new format, serdes address specified in the > old binding was used as the base address. This causes a boot hang as the > driver tries to access memory region outside of the specified address. Fix > it! > > Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Cc: stable@vger.kernel.org # 6.6 > Fixes: bb56cff4ac03 ("ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindings") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Mon, 11 Dec 2023 at 19:24, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > > While convering the binding to new format, serdes address specified in the > old binding was used as the base address. This causes a boot hang as the > driver tries to access memory region outside of the specified address. Fix > it! > > Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Cc: stable@vger.kernel.org # 6.6 > Fixes: bb56cff4ac03 ("ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindings") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi > index 2aa5089a8513..a88f186fcf03 100644 > --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi > @@ -436,9 +436,9 @@ pcie_ep: pcie-ep@1c00000 { > status = "disabled"; > }; > > - pcie_phy: phy@1c07000 { > + pcie_phy: phy@1c06000 { > compatible = "qcom,sdx55-qmp-pcie-phy"; > - reg = <0x01c07000 0x2000>; > + reg = <0x01c06000 0x2000>; > #address-cells = <1>; > #size-cells = <1>; > ranges; > -- > 2.25.1 >
On Mon, 11 Dec 2023 22:54:11 +0530, Manivannan Sadhasivam wrote: > While convering the binding to new format, serdes address specified in the > old binding was used as the base address. This causes a boot hang as the > driver tries to access memory region outside of the specified address. Fix > it! > > Applied, thanks! [1/1] ARM: dts: qcom-sdx55: Fix the base address of PCIe PHY commit: cc6fc55c7ae04ab19b3972f78d3a8b1be32bf533 Best regards,
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index 2aa5089a8513..a88f186fcf03 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -436,9 +436,9 @@ pcie_ep: pcie-ep@1c00000 { status = "disabled"; }; - pcie_phy: phy@1c07000 { + pcie_phy: phy@1c06000 { compatible = "qcom,sdx55-qmp-pcie-phy"; - reg = <0x01c07000 0x2000>; + reg = <0x01c06000 0x2000>; #address-cells = <1>; #size-cells = <1>; ranges;
While convering the binding to new format, serdes address specified in the old binding was used as the base address. This causes a boot hang as the driver tries to access memory region outside of the specified address. Fix it! Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: stable@vger.kernel.org # 6.6 Fixes: bb56cff4ac03 ("ARM: dts: qcom-sdx55: switch PCIe QMP PHY to new style of bindings") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)