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dt-bindings: PCI: qcom: delimit number of iommu-map entries

Message ID 20231229151744.203828-1-david@ixit.cz (mailing list archive)
State Superseded
Headers show
Series dt-bindings: PCI: qcom: delimit number of iommu-map entries | expand

Commit Message

David Heidelberg Dec. 29, 2023, 3:17 p.m. UTC
The code or specific SoC doesn't seem to limit the number of iommu-map entries.

Signed-off-by: David Heidelberg <david@ixit.cz>
---
 Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
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Patch

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index eadba38171e1..c6111278162f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -61,8 +61,7 @@  properties:
     minItems: 1
     maxItems: 8
 
-  iommu-map:
-    maxItems: 2
+  iommu-map: true
 
   # Common definitions for clocks, clock-names and reset.
   # Platform constraints are described later.