| Message ID | 20231229153310.206764-1-david@ixit.cz (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v2] dt-bindings: PCI: qcom: delimit number of iommu-map entries | expand |
On Fri, Dec 29, 2023 at 04:32:58PM +0100, David Heidelberg wrote: > The code or specific SoC doesn't seem to limit the number of iommu-map entries. > > Fixes: 1a24edc38dbf ("dt-bindings: PCI: qcom: Add SM8550 compatible") NACK. There is a limitation in the SoCs but that limitation differs. - Mani > Signed-off-by: David Heidelberg <david@ixit.cz> > --- > v2: added Fixes tag > > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index eadba38171e1..c6111278162f 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -61,8 +61,7 @@ properties: > minItems: 1 > maxItems: 8 > > - iommu-map: > - maxItems: 2 > + iommu-map: true > > # Common definitions for clocks, clock-names and reset. > # Platform constraints are described later. > -- > 2.43.0 >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index eadba38171e1..c6111278162f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -61,8 +61,7 @@ properties: minItems: 1 maxItems: 8 - iommu-map: - maxItems: 2 + iommu-map: true # Common definitions for clocks, clock-names and reset. # Platform constraints are described later.
The code or specific SoC doesn't seem to limit the number of iommu-map entries. Fixes: 1a24edc38dbf ("dt-bindings: PCI: qcom: Add SM8550 compatible") Signed-off-by: David Heidelberg <david@ixit.cz> --- v2: added Fixes tag Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)