| Message ID | 20240110114033.32575-21-quic_luoj@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show
Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com
[205.220.168.131])
(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBA5A48CFD;
Wed, 10 Jan 2024 11:45:18 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=none dis=none) header.from=quicinc.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=quicinc.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com
header.b="VeYB7et3"
Received: from pps.filterd (m0279867.ppops.net [127.0.0.1])
by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id
40AAJDrh022130;
Wed, 10 Jan 2024 11:44:27 GMT
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=
from:to:cc:subject:date:message-id:in-reply-to:references
:mime-version:content-transfer-encoding:content-type; s=
qcppdkim1; bh=3IZQM6XvE5040BQSbh/l/HNZdH7OFH6BBurWL7y3m+k=; b=Ve
YB7et3yMUFoiwPHtkH6/i0hJMRaNFtNu0M402WZubPv+ixpzkNy5Au08LQWQ/EML
nH4WB2HW9u85keugIq9f4L+eEmyPZgxpTfW8epUKKc9MMv196tZ5N/GZkXCAErib
6vXQdoW5c3x/lmzbGm1G38JEVcN6Zk1adppz+/inPVNvoASzwgno4mVmvVI6auqA
Z+2t/2dR0MqYxPM0+Z44nV7p14VC9WHlCqwaBPWsN7/dIF2+phRJlw+Abe5qNIwp
88wtHS3c9nUATu7BBT+Ud7s76dJRED0c1echzdW8AUjM4PQZFAdPaXTj7b8tmZ5j
csPjT6rYVa00ml6UNXZg==
Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com
[129.46.96.20])
by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vhjh2s23q-1
(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);
Wed, 10 Jan 2024 11:44:27 +0000 (GMT)
Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com
[10.47.97.35])
by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id
40ABiQu1021384
(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);
Wed, 10 Jan 2024 11:44:26 GMT
Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by
nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server
(version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id
15.2.1118.40; Wed, 10 Jan 2024 03:44:16 -0800
From: Luo Jie <quic_luoj@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
<pabeni@redhat.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<corbet@lwn.net>, <catalin.marinas@arm.com>, <will@kernel.org>,
<p.zabel@pengutronix.de>, <linux@armlinux.org.uk>,
<shannon.nelson@amd.com>, <anthony.l.nguyen@intel.com>,
<jasowang@redhat.com>, <brett.creeley@amd.com>,
<rrameshbabu@nvidia.com>, <joshua.a.hay@intel.com>, <arnd@arndb.de>,
<geert+renesas@glider.be>, <neil.armstrong@linaro.org>,
<dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>,
<m.szyprowski@samsung.com>, <u-kumar1@ti.com>,
<jacob.e.keller@intel.com>, <andrew@lunn.ch>
CC: <netdev@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>,
<ryazanov.s.a@gmail.com>, <ansuelsmth@gmail.com>,
<quic_kkumarcs@quicinc.com>, <quic_suruchia@quicinc.com>,
<quic_soni@quicinc.com>, <quic_pavir@quicinc.com>,
<quic_souravp@quicinc.com>, <quic_linchen@quicinc.com>,
<quic_leiwei@quicinc.com>
Subject: [PATCH net-next 20/20] arm64: defconfig: Enable qcom PPE driver
Date: Wed, 10 Jan 2024 19:40:32 +0800
Message-ID: <20240110114033.32575-21-quic_luoj@quicinc.com>
X-Mailer: git-send-email 2.42.0
In-Reply-To: <20240110114033.32575-1-quic_luoj@quicinc.com>
References: <20240110114033.32575-1-quic_luoj@quicinc.com>
Precedence: bulk
X-Mailing-List: linux-arm-msm@vger.kernel.org
List-Id: <linux-arm-msm.vger.kernel.org>
List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To
nalasex01c.na.qualcomm.com (10.47.97.35)
X-QCInternal: smtphost
X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800
signatures=585085
X-Proofpoint-ORIG-GUID: HJyj1YtmNxJBYdNIEldOibzZWvz3PKaT
X-Proofpoint-GUID: HJyj1YtmNxJBYdNIEldOibzZWvz3PKaT
X-Proofpoint-Virus-Version: vendor=baseguard
engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26
definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02
X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0
lowpriorityscore=0
mlxlogscore=660 clxscore=1015 bulkscore=0 malwarescore=0 spamscore=0
phishscore=0 priorityscore=1501 adultscore=0 impostorscore=0
suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1
engine=8.19.0-2311290000 definitions=main-2401100096
|
| Series |
net: ethernet: Add qcom PPE driver
|
expand
|
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b60aa1f89343..2be2aea9da2a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -283,6 +283,7 @@ CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_NVME=m CONFIG_QCOM_COINCELL=m CONFIG_QCOM_FASTRPC=m +CONFIG_QCOM_PPE=m CONFIG_BATTERY_QCOM_BATTMGR=m CONFIG_UCSI_PMIC_GLINK=m CONFIG_SRAM=y
Enable qcom PPE driver, which is used on the Qualcomm IPQ SoC. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)