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Wed, 24 Jan 2024 04:25:16 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 23 Jan 2024 20:25:16 -0800 From: Bjorn Andersson Date: Tue, 23 Jan 2024 20:25:16 -0800 Subject: [PATCH v3 2/8] clk: qcom: gdsc: Enable supply reglator in GPU GX handler Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240123-sa8295p-gpu-v3-2-d5b4474c8f33@quicinc.com> References: <20240123-sa8295p-gpu-v3-0-d5b4474c8f33@quicinc.com> In-Reply-To: <20240123-sa8295p-gpu-v3-0-d5b4474c8f33@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Taniya Das , Johan Hovold CC: , , , , , , "Bjorn Andersson" X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706070315; l=1360; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=7ZWW+8qHDNDoQXk/hD+0GuH82VHOG4uW2aOnjSqYjh0=; b=Ytv5aKLPjCbdZqOMtasS50BWZ4k4OZvAlWurSVggSYMUGJkOBm9KJN7NJA5JKc8RFi9JUo6MZ XQZHm7rvW8cCuTijAmK/fj5R/wI0SqYNTqq/OLsqJqOiRAHy+NNa5qg X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: WfxGJpnezKWqMoEl91iD932uD15vmf-I X-Proofpoint-ORIG-GUID: WfxGJpnezKWqMoEl91iD932uD15vmf-I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-24_01,2024-01-23_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 mlxlogscore=937 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401240029 The GX GDSC is modelled to aid the GMU in powering down the GPU in the event that the GPU crashes, so that it can be restarted again. But in the event that the power-domain is supplied through a dedicated regulator (in contrast to being a subdomin of another power-domain), something needs to turn that regulator on, both to make sure things are powered and to match the operation in gdsc_disable(). Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/gdsc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 5358e28122ab..e7a4068b9f39 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -557,7 +557,15 @@ void gdsc_unregister(struct gdsc_desc *desc) */ int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain) { - /* Do nothing but give genpd the impression that we were successful */ - return 0; + struct gdsc *sc = domain_to_gdsc(domain); + int ret = 0; + + /* Enable the parent supply, when controlled through the regulator framework. */ + if (sc->rsupply) + ret = regulator_enable(sc->rsupply); + + /* Do nothing with the GDSC itself */ + + return ret; } EXPORT_SYMBOL_GPL(gdsc_gx_do_nothing_enable);