| Message ID | 20240124-pcie-aux-clk-fix-v1-1-d8a4852b6ba6@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Drop PCIE_AUX_CLK from the PCIe PHY nodes of Qcom SoCs | expand |
On 24/01/2024 08:36, Manivannan Sadhasivam wrote: > PCIe PHY hw doesn't require PCIE_AUX_CLK for functioning. This clock is > only required by the PCIe controller. Hence drop it from the binding. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > .../devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml index 634cec5d57ea..a953ac197dfd 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml @@ -25,11 +25,10 @@ properties: - description: serdes clocks: - maxItems: 3 + maxItems: 2 clock-names: items: - - const: aux - const: cfg_ahb - const: pipe @@ -72,11 +71,9 @@ examples: compatible = "qcom,ipq6018-qmp-pcie-phy"; reg = <0x00084000 0x1000>; - clocks = <&gcc GCC_PCIE0_AUX_CLK>, - <&gcc GCC_PCIE0_AHB_CLK>, + clocks = <&gcc GCC_PCIE0_AHB_CLK>, <&gcc GCC_PCIE0_PIPE_CLK>; - clock-names = "aux", - "cfg_ahb", + clock-names = "cfg_ahb", "pipe"; clock-output-names = "gcc_pcie0_pipe_clk_src";
PCIe PHY hw doesn't require PCIE_AUX_CLK for functioning. This clock is only required by the PCIe controller. Hence drop it from the binding. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- .../devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)