From patchwork Sun Feb 4 17:45:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 13544760 Received: from m-r2.th.seeweb.it (m-r2.th.seeweb.it [5.144.164.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6480A2421C for ; Sun, 4 Feb 2024 17:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.144.164.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707068732; cv=none; b=gAKkuh8V2OwBALi5vdSsGdnHub2/jJC1/fji5jdgQYClKQCftxpMmGBmaUH1BO5oPs2KcIFH6fhyeoOEbXzyXOK21NyrQZUsyXr1iiHfp9rJBL21rF3FQRU6G/k/1IYa6MrAhrTg3XrsiomrfmIS7pd2+aXrychgl5uiRhWsi20= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707068732; c=relaxed/simple; bh=eJbZT3mdrNA2RzxGIe/uKdeOxu+kH6M/tWk7d/atqWM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=WAzFAGVCi+c1O83Uaw8Xm3d3UCw3pmCmdNGxd37rKeELidQcCv2cx2HDMM2YxQ+0ghNA1qH2AM/o4noBjyw+LD1lQOPOtFuHowb3QqsgC5OKUI/Mp5ZoKrSCEgLxUlkkfuVUBf2XOHIC7aZ74lKvzVtwu+RzKmZAuu+MpaR1C1A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org; spf=pass smtp.mailfrom=somainline.org; arc=none smtp.client-ip=5.144.164.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=somainline.org Received: from Marijn-Arch-Book.localdomain (2a02-a420-67-c93f-164f-8aff-fee4-5930.mobile6.kpn.net [IPv6:2a02:a420:67:c93f:164f:8aff:fee4:5930]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 7360D3F092; Sun, 4 Feb 2024 18:45:28 +0100 (CET) From: Marijn Suijten Date: Sun, 04 Feb 2024 18:45:27 +0100 Subject: [PATCH] drm/msm/dpu: Only enable DSC_MODE_MULTIPLEX if dsc_merge is enabled Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240204-dpu-dsc-multiplex-v1-1-080963233c52@somainline.org> X-B4-Tracking: v=1; b=H4sIADbNv2UC/x3MQQqAIBBA0avErBswE6KuEi1KxxowE80IorsnL d/i/wcSRaYEQ/VApIsTH76gqSvQ2+xXQjbFIIVUQgqFJmQ0SeOe3cnB0Y2q141auta2JKB0IZL l+3+O0/t+A1HiRmMAAAA= To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Luca Weiss , Marijn Suijten X-Mailer: b4 0.12.4 When the topology calls for two interfaces on the current fixed topology of 2 DSC blocks, or uses 1 DSC block for a single interface (e.g. SC7280 with only one DSC block), there should be no merging of DSC output. This is already represented by the return value of dpu_encoder_use_dsc_merge(), but not yet used to correctly configure this flag. Fixes: 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in encoder") Signed-off-by: Marijn Suijten Reviewed-by: Dmitry Baryshkov --- Note that more changes are needed to properly support the proposed 2:2:2 and 1:1:1 topology (in contrast to the already-supported 2:2:1 topology), but this could be a trivial patch to get going separately before all that extra work is done. --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) --- base-commit: 01af33cc9894b4489fb68fa35c40e9fe85df63dc change-id: 20240204-dpu-dsc-multiplex-49c14b73f3e0 Best regards, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 83380bc92a00..6d3ed4d870d7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1857,7 +1857,9 @@ static void dpu_encoder_prep_dsc(struct dpu_encoder_virt *dpu_enc, dsc_common_mode = 0; pic_width = dsc->pic_width; - dsc_common_mode = DSC_MODE_MULTIPLEX | DSC_MODE_SPLIT_PANEL; + dsc_common_mode = DSC_MODE_SPLIT_PANEL; + if (dpu_encoder_use_dsc_merge(enc_master->parent)) + dsc_common_mode |= DSC_MODE_MULTIPLEX; if (enc_master->intf_mode == INTF_MODE_VIDEO) dsc_common_mode |= DSC_MODE_VIDEO;