| Message ID | 20240209-qcm6490-gcc-protected-clocks-v1-1-bd3487b2e7b1@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected | expand |
On 9.02.2024 17:21, Bjorn Andersson wrote: > The SC7180 GCC binding describes clocks which, due to the difference in > security model, are not accessible on the RB3gen2 - in the same way seen > on QCM6490. > > Mark these clocks as protected, to allow the board to boot. > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Fri Feb 9, 2024 at 5:21 PM CET, Bjorn Andersson wrote: > The SC7180 GCC binding describes clocks which, due to the difference in SC7180 -> SC7280? With that fixed: Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> > security model, are not accessible on the RB3gen2 - in the same way seen > on QCM6490. > > Mark these clocks as protected, to allow the board to boot. So the board never was able to boot before this patch? > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > I did notice Taniya's patch [1] after writing this patch. I'd prefer to > merge this minimal set asap, to make the board boot, unless there's a > strong argument for including those other clocks in the protected list. > > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 8bb7d13d85f6..97b1586f9f19 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { > }; > }; > > +&gcc { > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > + <GCC_EDP_CLKREF_EN>, > + <GCC_MSS_CFG_AHB_CLK>, > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, > + <GCC_MSS_OFFLINE_AXI_CLK>, > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > + <GCC_MSS_SNOC_AXI_CLK>, > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > + <GCC_QSPI_CORE_CLK>, > + <GCC_QSPI_CORE_CLK_SRC>, > + <GCC_SEC_CTRL_CLK_SRC>, > + <GCC_WPSS_AHB_BDG_MST_CLK>, > + <GCC_WPSS_AHB_CLK>, > + <GCC_WPSS_RSCP_CLK>; > +}; > + > &qupv3_id_0 { > status = "okay"; > }; > > --- > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 > > Best regards,
On Fri, 9 Feb 2024 at 18:47, Luca Weiss <luca.weiss@fairphone.com> wrote: > > On Fri Feb 9, 2024 at 5:21 PM CET, Bjorn Andersson wrote: > > The SC7180 GCC binding describes clocks which, due to the difference in > > SC7180 -> SC7280? > > With that fixed: > > Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> > > > security model, are not accessible on the RB3gen2 - in the same way seen > > on QCM6490. > > > > Mark these clocks as protected, to allow the board to boot. > > So the board never was able to boot before this patch? Seems so, we had a similar patch in the meta-qcom repo for those boards: https://github.com/Linaro/meta-qcom/blob/master/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch > > > > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > > --- > > I did notice Taniya's patch [1] after writing this patch. I'd prefer to > > merge this minimal set asap, to make the board boot, unless there's a > > strong argument for including those other clocks in the protected list. > > > > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ > > --- > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > index 8bb7d13d85f6..97b1586f9f19 100644 > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { > > }; > > }; > > > > +&gcc { > > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > > + <GCC_EDP_CLKREF_EN>, > > + <GCC_MSS_CFG_AHB_CLK>, > > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, > > + <GCC_MSS_OFFLINE_AXI_CLK>, > > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > > + <GCC_MSS_SNOC_AXI_CLK>, > > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > > + <GCC_QSPI_CORE_CLK>, > > + <GCC_QSPI_CORE_CLK_SRC>, > > + <GCC_SEC_CTRL_CLK_SRC>, > > + <GCC_WPSS_AHB_BDG_MST_CLK>, > > + <GCC_WPSS_AHB_CLK>, > > + <GCC_WPSS_RSCP_CLK>; > > +}; > > + > > &qupv3_id_0 { > > status = "okay"; > > }; > > > > --- > > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d > > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 > > > > Best regards, >
On Fri, 9 Feb 2024 at 18:21, Bjorn Andersson <quic_bjorande@quicinc.com> wrote: > > The SC7180 GCC binding describes clocks which, due to the difference in > security model, are not accessible on the RB3gen2 - in the same way seen > on QCM6490. > > Mark these clocks as protected, to allow the board to boot. > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > I did notice Taniya's patch [1] after writing this patch. I'd prefer to > merge this minimal set asap, to make the board boot, unless there's a > strong argument for including those other clocks in the protected list. > > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 8bb7d13d85f6..97b1586f9f19 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { > }; > }; > > +&gcc { > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > + <GCC_EDP_CLKREF_EN>, I'd say these two clocks looks strange in this list, but you probably know what you are doing. Thus: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > + <GCC_MSS_CFG_AHB_CLK>, > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, > + <GCC_MSS_OFFLINE_AXI_CLK>, > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > + <GCC_MSS_SNOC_AXI_CLK>, > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > + <GCC_QSPI_CORE_CLK>, > + <GCC_QSPI_CORE_CLK_SRC>, > + <GCC_SEC_CTRL_CLK_SRC>, > + <GCC_WPSS_AHB_BDG_MST_CLK>, > + <GCC_WPSS_AHB_CLK>, > + <GCC_WPSS_RSCP_CLK>; > +}; > + > &qupv3_id_0 { > status = "okay"; > }; > > --- > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 > > Best regards, > -- > Bjorn Andersson <quic_bjorande@quicinc.com> >
On Fri, Feb 09, 2024 at 05:47:35PM +0100, Luca Weiss wrote: > On Fri Feb 9, 2024 at 5:21 PM CET, Bjorn Andersson wrote: > > The SC7180 GCC binding describes clocks which, due to the difference in > > SC7180 -> SC7280? > Indeed, got lost in the number soup. > With that fixed: > > Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> > > > security model, are not accessible on the RB3gen2 - in the same way seen > > on QCM6490. > > > > Mark these clocks as protected, to allow the board to boot. > > So the board never was able to boot before this patch? > Correct. With this and the correction of the voltage ranges for vph_pwr, the board is now booting with only some minor errors in the log... Regards, Bjorn > > > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > > --- > > I did notice Taniya's patch [1] after writing this patch. I'd prefer to > > merge this minimal set asap, to make the board boot, unless there's a > > strong argument for including those other clocks in the protected list. > > > > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ > > --- > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > index 8bb7d13d85f6..97b1586f9f19 100644 > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { > > }; > > }; > > > > +&gcc { > > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > > + <GCC_EDP_CLKREF_EN>, > > + <GCC_MSS_CFG_AHB_CLK>, > > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, > > + <GCC_MSS_OFFLINE_AXI_CLK>, > > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > > + <GCC_MSS_SNOC_AXI_CLK>, > > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > > + <GCC_QSPI_CORE_CLK>, > > + <GCC_QSPI_CORE_CLK_SRC>, > > + <GCC_SEC_CTRL_CLK_SRC>, > > + <GCC_WPSS_AHB_BDG_MST_CLK>, > > + <GCC_WPSS_AHB_CLK>, > > + <GCC_WPSS_RSCP_CLK>; > > +}; > > + > > &qupv3_id_0 { > > status = "okay"; > > }; > > > > --- > > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d > > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 > > > > Best regards, >
On Fri, Feb 09, 2024 at 08:01:15PM +0200, Dmitry Baryshkov wrote: > On Fri, 9 Feb 2024 at 18:21, Bjorn Andersson <quic_bjorande@quicinc.com> wrote: > > > > The SC7180 GCC binding describes clocks which, due to the difference in > > security model, are not accessible on the RB3gen2 - in the same way seen > > on QCM6490. > > > > Mark these clocks as protected, to allow the board to boot. > > > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > > --- > > I did notice Taniya's patch [1] after writing this patch. I'd prefer to > > merge this minimal set asap, to make the board boot, unless there's a > > strong argument for including those other clocks in the protected list. > > > > [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ > > --- > > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > index 8bb7d13d85f6..97b1586f9f19 100644 > > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > > @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { > > }; > > }; > > > > +&gcc { > > + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, > > + <GCC_EDP_CLKREF_EN>, > > I'd say these two clocks looks strange in this list, but you probably > know what you are doing. Thus: > Perhaps I wasn't clear enough in the commit message, I took this list from one of the QCM6490 devices, as it seemed reasonable. I wondered about this entry, but didn't pay enough attention and didn't test without it. But you're obviously correct, it would be very weird, in particular considering that the board exposes &mdss_edp on a physical connector. Sure enough, not only is it accessible, I hacked up a patch for enabling DisplayPort (on &mdss_edp) and as expected it doesn't work without GCC_EDP_CLKREF_EN. > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Taking the liberty to carry this into v2. Thank you, Bjorn > > + <GCC_MSS_CFG_AHB_CLK>, > > + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, > > + <GCC_MSS_OFFLINE_AXI_CLK>, > > + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, > > + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, > > + <GCC_MSS_SNOC_AXI_CLK>, > > + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > > + <GCC_QSPI_CORE_CLK>, > > + <GCC_QSPI_CORE_CLK_SRC>, > > + <GCC_SEC_CTRL_CLK_SRC>, > > + <GCC_WPSS_AHB_BDG_MST_CLK>, > > + <GCC_WPSS_AHB_CLK>, > > + <GCC_WPSS_RSCP_CLK>; > > +}; > > + > > &qupv3_id_0 { > > status = "okay"; > > }; > > > > --- > > base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d > > change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 > > > > Best regards, > > -- > > Bjorn Andersson <quic_bjorande@quicinc.com> > > > > > -- > With best wishes > Dmitry
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index 8bb7d13d85f6..97b1586f9f19 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -413,6 +413,24 @@ vreg_bob_3p296: bob { }; }; +&gcc { + protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, + <GCC_EDP_CLKREF_EN>, + <GCC_MSS_CFG_AHB_CLK>, + <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, + <GCC_MSS_OFFLINE_AXI_CLK>, + <GCC_MSS_Q6SS_BOOT_CLK_SRC>, + <GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <GCC_MSS_SNOC_AXI_CLK>, + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_QSPI_CORE_CLK>, + <GCC_QSPI_CORE_CLK_SRC>, + <GCC_SEC_CTRL_CLK_SRC>, + <GCC_WPSS_AHB_BDG_MST_CLK>, + <GCC_WPSS_AHB_CLK>, + <GCC_WPSS_RSCP_CLK>; +}; + &qupv3_id_0 { status = "okay"; };
The SC7180 GCC binding describes clocks which, due to the difference in security model, are not accessible on the RB3gen2 - in the same way seen on QCM6490. Mark these clocks as protected, to allow the board to boot. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- I did notice Taniya's patch [1] after writing this patch. I'd prefer to merge this minimal set asap, to make the board boot, unless there's a strong argument for including those other clocks in the protected list. [1] https://lore.kernel.org/linux-arm-msm/20240208062836.19767-6-quic_tdas@quicinc.com/ --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) --- base-commit: b1d3a0e70c3881d2f8cf6692ccf7c2a4fb2d030d change-id: 20240209-qcm6490-gcc-protected-clocks-ee5fafdb76b3 Best regards,