From patchwork Tue Feb 13 19:34:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13555535 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ECF46088E; Tue, 13 Feb 2024 19:35:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707852919; cv=none; b=Ee7DBiCUIA9HWzPEbYsiCMxdumRLhz96pX+3d9i+QBF9YPdFK/LMMcMRJcu8szxZ0eAsZwZ2KFYcBKbHa1mWi8lc0bPOHLABOvqnFigx5t28VDclr0F2x9it8mWjM1KGMlaQOOVvuCrRhh3tp24ukrqgNZz04YfQzTwLb7nYbOg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707852919; c=relaxed/simple; bh=wSVuDaYSgh8MRixfbgvvFkBg3ejCEwObxIZSwlWgJa4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ATFr8hzHjpnVozknYhThWE2EZBkbAb4gSvorl8EkTe6xGh+TH3B0gvp1G/TsZAi7RvXVFg1djVXtu4KH2tpV7Ia7wOZV55voyR7Q08XISHytTuoFdiNjfnfpJoh2Rg7IkBLvtk1qTfOW9WEXN2g/JGhBlVuvGfIy1QABYuDeeAY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sU1N4Ggy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sU1N4Ggy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E623CC433C7; Tue, 13 Feb 2024 19:35:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707852919; bh=wSVuDaYSgh8MRixfbgvvFkBg3ejCEwObxIZSwlWgJa4=; h=From:Date:Subject:References:In-Reply-To:List-Id:To:Cc:From; b=sU1N4Ggyxhx9lERFgDp3HswZEeDvw732OLECne+I4Atpgqblh4cjja3l1sOtHoYl9 l4dwZ+ziMxlfjtve6lVljsTFIcvmXjKYBQ67e/js6lCJzMDx3omgBVxFxh+cpbdJ3K ueRtx+gAJt1uQoXbtpoQhKfp/FrApaqLNGG8OsjkSURY5NvOmoE/UZMuIglTGuJlN/ igWEIOhI1bq6q1be+4Q4sWE31EpquEUWwrCaPxrrf3CxjTIr8R4S3/iF0K6nLZMv1n mhE2OnbR162tkiAXlw/c2oDCTV64L+hKXBoPRMs21+2xmFBfgTWGJgpMvp15ZtC2JP 0GPOgUMijJiWg== From: Rob Herring Date: Tue, 13 Feb 2024 13:34:28 -0600 Subject: [PATCH 4/6] arm: dts: Fix dtc interrupt_map warnings Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240213-arm-dt-cleanups-v1-4-f2dee1292525@kernel.org> References: <20240213-arm-dt-cleanups-v1-0-f2dee1292525@kernel.org> In-Reply-To: <20240213-arm-dt-cleanups-v1-0-f2dee1292525@kernel.org> To: soc@kernel.org, Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tsahee Zidenberg , Antoine Tenart , Joel Stanley , Andrew Jeffery , Ray Jui , Scott Branden , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , =?utf-8?q?Jonatha?= =?utf-8?q?n_Neusch=C3=A4fer?= , Thierry Reding , Jonathan Hunter , Stefan Agner , Maxime Coquelin , Alexandre Torgue , =?utf-8?q?Beno=C3=AEt_Cou?= =?utf-8?q?sson?= , Tony Lindgren , Chanho Min , Matthias Brugger , AngeloGioacchino Del Regno , Geert Uytterhoeven , Magnus Damm , Linus Walleij , Imre Kaloz , Bjorn Andersson , Konrad Dybcio , Masahiro Yamada , Nathan Chancellor , Nicolas Schier Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-omap@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kbuild@vger.kernel.org X-Mailer: b4 0.13-dev The dtc interrupt_map warning is off because its dependency, interrupt_provider, is off by default. Fix all the warnings so it can be enabled. Signed-off-by: Rob Herring Reviewed-by: Linus Walleij --- arch/arm/boot/dts/intel/ixp/intel-ixp42x-gateway-7001.dts | 2 ++ arch/arm/boot/dts/intel/ixp/intel-ixp42x-goramo-multilink.dts | 2 ++ arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 8 ++++---- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-gateway-7001.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-gateway-7001.dts index 4d70f6afd13a..6d5e69035f94 100644 --- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-gateway-7001.dts +++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-gateway-7001.dts @@ -60,6 +60,8 @@ pci@c0000000 { * We have slots (IDSEL) 1 and 2 with one assigned IRQ * each handling all IRQs. */ + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = /* IDSEL 1 */ <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */ diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-goramo-multilink.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-goramo-multilink.dts index 9ec0169bacf8..5f4c849915db 100644 --- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-goramo-multilink.dts +++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-goramo-multilink.dts @@ -89,6 +89,8 @@ pci@c0000000 { * The slots have Ethernet, Ethernet, NEC and MPCI. * The IDSELs are 11, 12, 13, 14. */ + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = /* IDSEL 11 - Ethernet A */ <0x5800 0 0 1 &gpio0 4 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 11 is irq 4 */ diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index 2045fc779f88..27429d0fedfb 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -340,10 +340,10 @@ pcie_rc: pcie@1c00000 { "msi8"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 0 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 0 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 0 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 0 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + interrupt-map = <0 0 0 1 &intc 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ clocks = <&gcc GCC_PCIE_PIPE_CLK>, <&gcc GCC_PCIE_AUX_CLK>,