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Tue, 20 Feb 2024 19:43:17 -0800 (PST) Received: from [127.0.1.1] ([117.207.28.224]) by smtp.gmail.com with ESMTPSA id o23-20020a056a001b5700b006e466369645sm4436231pfv.132.2024.02.20.19.43.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 19:43:16 -0800 (PST) From: Manivannan Sadhasivam Date: Wed, 21 Feb 2024 09:12:06 +0530 Subject: [PATCH 20/21] ARM: dts: qcom: sdx55: Add PCIe bridge node Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240221-pcie-qcom-bridge-dts-v1-20-6c6df0f9450d@linaro.org> References: <20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org> In-Reply-To: <20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=895; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=3jx7xcLFBNs3MoMPC7hOG3cqD1b3y0NhSb/veZhqzaw=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl1XEJ0dYtKghZH8nSt5KbXAa7K43VgCuWjwSTS qwWd7D9xTWJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZdVxCQAKCRBVnxHm/pHO 9eSqCACVezpkM5fzyHWjKwcI9D/5H8bEjfZ3JGxrFTpT375ZlftDiC8YFM9PwY6TARsaUtuir4h QfFsjMoctfImFxsrv4v8mIQE84JUA0BP3dQJYMZS7EHSIDs0p4KjQ7ywnV9YVW03kn0TJ+oFbWs KpqT4BHsfA2KrxztKIdc0cdc38ZZGl33T9w85pOb2E+hQXmyMPLDSiuucJZjZo/uVIXnCa4xc15 0Xs/pCa1/EmlelG3a/0za6AoeGqOoFKXqLC4AUwhQ6FiG4zwogrgR+T+Es6Sdv86YoUHsX2t5K+ AQytcdZsnb28J7q8Tw2qgQP7rJoO7MTdAJshR5hVXhg83OVl X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi index 2045fc779f88..053dac097c70 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi @@ -378,6 +378,16 @@ pcie_rc: pcie@1c00000 { phy-names = "pciephy"; status = "disabled"; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie_ep: pcie-ep@1c00000 {