| Message ID | 20240328-alpha-pll-fix-stromer-set-rate-v3-1-1b79714c78bc@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | f837535fcb32a0313e07dd8ac49c2cfa43b49260 |
| Headers | show |
| Series | [v3] clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs | expand |
On Thu, 28 Mar 2024 08:54:31 +0100, Gabor Juhos wrote: > The clk_alpha_pll_stromer_set_rate() function writes inproper > values into the ALPHA_VAL{,_U} registers which results in wrong > clock rates when the alpha value is used. > > The broken behaviour can be seen on IPQ5018 for example, when > dynamic scaling sets the CPU frequency to 800000 KHz. In this > case the CPU cores are running only at 792031 KHz: > > [...] Applied, thanks! [1/1] clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs commit: f837535fcb32a0313e07dd8ac49c2cfa43b49260 Best regards,
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 8a412ef47e16..8a8abb429577 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -2490,6 +2490,8 @@ static int clk_alpha_pll_stromer_set_rate(struct clk_hw *hw, unsigned long rate, rate = alpha_pll_round_rate(rate, prate, &l, &a, ALPHA_REG_BITWIDTH); regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); + + a <<= ALPHA_REG_BITWIDTH - ALPHA_BITWIDTH; regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> ALPHA_BITWIDTH);
The clk_alpha_pll_stromer_set_rate() function writes inproper values into the ALPHA_VAL{,_U} registers which results in wrong clock rates when the alpha value is used. The broken behaviour can be seen on IPQ5018 for example, when dynamic scaling sets the CPU frequency to 800000 KHz. In this case the CPU cores are running only at 792031 KHz: # cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq 800000 # cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq 792031 This happens because the function ignores the fact that the alpha value calculated by the alpha_pll_round_rate() function is only 32 bits wide which must be extended to 40 bits if it is used on a hardware which supports 40 bits wide values. Extend the clk_alpha_pll_stromer_set_rate() function to convert the alpha value to 40 bits before wrinting that into the registers in order to ensure that the hardware really uses the requested rate. After the change the CPU frequency is correct: # cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq 800000 # cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq 800000 Cc: stable@vger.kernel.org Fixes: e47a4f55f240 ("clk: qcom: clk-alpha-pll: Add support for Stromer PLLs") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> --- Changes in v3: - remove constants' comparison (Konrad) - Link to v2: https://lore.kernel.org/r/20240326-alpha-pll-fix-stromer-set-rate-v2-1-48ae83af71c8@gmail.com Changes in v2: - fix subject prefix - rebase on v6.9-rc1 - Link to v1: https://lore.kernel.org/r/20240324-alpha-pll-fix-stromer-set-rate-v1-1-335b0b157219@gmail.com Depends on the following patch: https://lore.kernel.org/r/20240315-apss-ipq-pll-ipq5018-hang-v2-1-6fe30ada2009@gmail.com --- drivers/clk/qcom/clk-alpha-pll.c | 2 ++ 1 file changed, 2 insertions(+) --- base-commit: 4cece764965020c22cff7665b18a012006359095 change-id: 20240324-alpha-pll-fix-stromer-set-rate-472376e624f0 Best regards,