| Message ID | 20240403-msm-drm-dsc-dsi-video-upstream-v1-2-db5036443545@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add DSC support to DSI video panel | expand |
On Wed, 3 Apr 2024 at 12:11, Jun Nie <jun.nie@linaro.org> wrote: > > From: Jonathan Marek <jonathan@marek.ca> > > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > driver is doing in video mode. Fix that by actually enabling widebus for > video mode. > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > Signed-off-by: Jun Nie <jun.nie@linaro.org> You have ignored all the review comments that were provided for v1. None of the tags were picked up either. Have you posted this for internal review like I have explicitly asked you? > --- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h > index 2a7d980e12c3..f0b3cdc020a1 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h > +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h > @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) > #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 > #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 > #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 > +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 > #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 From the top of the file: /* Autogenerated file, DO NOT EDIT manually! > > #define REG_DSI_VID_CFG1 0x0000001c > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index 9d86a6aca6f2..2a0422cad6de 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -754,6 +754,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, > data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); > data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); > data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); > + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) > + data |= DSI_VID_CFG0_DATABUS_WIDEN; > dsi_write(msm_host, REG_DSI_VID_CFG0, data); > > /* Do not swap RGB colors */ > > -- > 2.34.1 >
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2024年4月3日周三 18:10写道： > > On Wed, 3 Apr 2024 at 12:11, Jun Nie <jun.nie@linaro.org> wrote: > > > > From: Jonathan Marek <jonathan@marek.ca> > > > > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > > driver is doing in video mode. Fix that by actually enabling widebus for > > video mode. > > > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > You have ignored all the review comments that were provided for v1. > None of the tags were picked up either. Just find that It was an accident that I cherry-picked wrong patch. > > Have you posted this for internal review like I have explicitly asked you? Sorry, I guess I skipped your word in depression when I read the email. > > > --- > > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > > 2 files changed, 3 insertions(+) > > > > diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h > > index 2a7d980e12c3..f0b3cdc020a1 100644 > > --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h > > +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h > > @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) > > #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 > > #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 > > #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 > > +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 > > #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 > > From the top of the file: > > /* Autogenerated file, DO NOT EDIT manually! This is my fault, I did not notice the top of this file totally. Will fix it in next version. > > > > > #define REG_DSI_VID_CFG1 0x0000001c > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > > index 9d86a6aca6f2..2a0422cad6de 100644 > > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > > @@ -754,6 +754,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, > > data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); > > data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); > > data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); > > + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) > > + data |= DSI_VID_CFG0_DATABUS_WIDEN; > > dsi_write(msm_host, REG_DSI_VID_CFG0, data); > > > > /* Do not swap RGB colors */ > > > > -- > > 2.34.1 > > > > > -- > With best wishes > Dmitry
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h index 2a7d980e12c3..f0b3cdc020a1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 #define REG_DSI_VID_CFG1 0x0000001c diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9d86a6aca6f2..2a0422cad6de 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -754,6 +754,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) + data |= DSI_VID_CFG0_DATABUS_WIDEN; dsi_write(msm_host, REG_DSI_VID_CFG0, data); /* Do not swap RGB colors */