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Mon, 27 May 2024 01:44:11 -0700 (PDT) From: Bartosz Golaszewski Date: Mon, 27 May 2024 10:43:48 +0200 Subject: [PATCH v2 1/5] dt-bindings: remoteproc: qcom,sa8775p-pas: Document the SA8775p ADSP, CDSP and GPDSP Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240527-topic-lemans-iot-remoteproc-v2-1-8d24e3409daf@linaro.org> References: <20240527-topic-lemans-iot-remoteproc-v2-0-8d24e3409daf@linaro.org> In-Reply-To: <20240527-topic-lemans-iot-remoteproc-v2-0-8d24e3409daf@linaro.org> To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Manivannan Sadhasivam , Jassi Brar Cc: Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tengfei Fan , Srini Kandagatla , Alex Elder X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5544; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=leIKa/UcmJaFYJmvDmKOwmxkj/TaQjJErtw/XziYiaA=; b=owEBbQKS/ZANAwAKARGnLqAUcddyAcsmYgBmVEfY6nwdfzrqX8cHFFoaGHLnzqVJU/+XYmdGa UphrjRvxQGJAjMEAAEKAB0WIQQWnetsC8PEYBPSx58Rpy6gFHHXcgUCZlRH2AAKCRARpy6gFHHX cmBcD/0bv1CgoCxlmxwCDDkrweb13DNecIupZMc6hBdxEg8fHluwWV7gPV2/z+yxd79BK3gIW1i fk3unXUef9GCePd5rHWlIatX5TMeBD2TjInGEEVxAt6d73BcaEhZevMk7BQgIUEsi0z8FRGSvOp 1rE+mz96Z/gybygAvPEop3avY8PMXkohUmgI9rD7k67GtLmwDtrIDIktx+9heR/h4j1yVI9N00g x30++JLjwJZTecrxBRe9XEhn7ifleW8wNpfGapvymIHis0k68N8qEP5g2XLu0ZorSZbX5pO+vTU nDwudyO8DMYGZVm6m67ZcryZGca9QjmesnmpKAuhK8Yz2E/grLUjO5EL0mP0b+Lzu1NKMbomZdd QzvoVWaWL3eDdOF9iIhGmHdm8zbbxMNLRkaxvvP1uvSn9R3pBv5ir0ynHfi8VzG88LmtMUtFfAW Yk3gfUUQo/cjaaY6LqD0iK8f3nNSpPqdSku7nP2PPo0EUBdj4Qh+HwtKyASCJ4nO5Ff/AFxl4Nc Va/j2QZQHpArIIlCAMctsvvO4cSgY92qCVshbhHSrTc5Neivi6ms9ZeQw5juFzRdCpbAyjsrwLo sXofb0kWnJioLQpQyDH21cmmuRxYzNexpWYF/IfLUMqYhJgJAagmEGX1Kd8ww8RXADK8et/paY4 CYiAbsVCzykEIvA== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Document the components used to boot the ADSP, CDSP0, CDSP1, GPDSP0 and GPDSP1 on the SA8775p SoC. Co-developed-by: Tengfei Fan Signed-off-by: Bartosz Golaszewski --- .../bindings/remoteproc/qcom,sa8775p-pas.yaml | 177 +++++++++++++++++++++ 1 file changed, 177 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml new file mode 100644 index 000000000000..77a5e11555de --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml @@ -0,0 +1,177 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8775p Peripheral Authentication Service + +maintainers: + - Bartosz Golaszewski + +description: + Qualcomm SA8775p SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sa8775p-adsp-pas + - qcom,sa8775p-cdsp0-pas + - qcom,sa8775p-cdsp1-pas + - qcom,sa8775p-gpdsp0-pas + - qcom,sa8775p-gpdsp1-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + + memory-region: + items: + - description: Memory region for main Firmware authentication + + interrupts: + maxItems: 5 + + interrupt-names: + maxItems: 5 + +required: + - compatible + - reg + - memory-region + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + + - if: + properties: + compatible: + enum: + - qcom,sa8775p-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sa8775p-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP0 power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp0 + + - if: + properties: + compatible: + enum: + - qcom,sa8775p-cdsp1-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP1 power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp1 + + - if: + properties: + compatible: + enum: + - qcom,sa8775p-gpdsp0-pas + - qcom,sa8775p-gpdsp1-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + remoteproc@30000000 { + compatible = "qcom,sa8775p-adsp-pas"; + reg = <0x30000000 0x100>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_LCX>, <&rpmhpd RPMHPD_LMX>; + power-domain-names = "lcx", "lmx"; + + interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>; + + memory-region = <&pil_adsp_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + }; + };