From patchwork Wed Jun 12 12:40:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 13694910 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59DD717B42A; Wed, 12 Jun 2024 12:41:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718196108; cv=none; b=JzSi+PzG9qvk9u8nLI5wIA2zDZAHPRmgH7ZwyoIyfwQ2aCqaD7r7tvfXuEG8dCc2pnWLcczhJSdBxf2gNgOIjx+If97NjgpDU0htdgKp4sPbraDhIRmgzcfLQg20YnWTqdPdTkPQC4+S199Hdga1acV6ZuyPrSjS7e1Ws7iafTA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718196108; c=relaxed/simple; bh=ChyPFqH+i5KWbsUxVFYKkAwMlW75WIUPyccoOYkaORM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=im5fwj25bw8+Oj25vW8fCSbcFEqcxVFrAmlFG/3FNKegnRWb4fFwRr3Y5S9m6eMKTkeOiZM7B+coJzdUHnavuK6RlqQtTgselCTwk1UOwkoPz4KWCoa35nohl8md8yddOCiUkczEsE8yH1t0qlCknJaUU6WcdBRGhumg+URIpNM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=px+fnC+/; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="px+fnC+/" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45C4YSBu002224; Wed, 12 Jun 2024 12:41:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= H3U6AIT9aUnPw+VW7qYN8QAxNenNr/ZtwfuD7Ehgdx0=; b=px+fnC+/pUcEgap5 ln5UBZ7mE0tOrFtUUoT0jq1wogXHp3m8IpPJOSisAZbvKNhm9RVENX8sW2ljYKfx PTzt7qC9wjLW2vpEJnQ4aqKHAkXH4KAXUDhfMPbsw4uUxkMWc+j1e/LUiNlZ4vDt FcBYdm0h5j6q69+R0K4yeQ8DpZQaOXrCebFNrm7V2LeAjhJBUf/YpiAA6iqiHq5k FAQdiaZz/XwpnbmhnTPe21sD/gFYT/Yg/Po5wWgEaGF+bPq991PO6uTv8dGHqBD0 5zpgpGQw9+oLOTSHmzGLxX15X04TRJuhqDmsSP+uOu2AgE8De9CnU+Orj/LkPSwW vccXXw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3yq4s093jp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jun 2024 12:41:41 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45CCfeU2016295 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jun 2024 12:41:40 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 12 Jun 2024 05:41:34 -0700 From: Sibi Sankar To: , , , , , , , CC: , , , , , , , , , Subject: [PATCH V6 4/5] arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes Date: Wed, 12 Jun 2024 18:10:55 +0530 Message-ID: <20240612124056.39230-5-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240612124056.39230-1-quic_sibis@quicinc.com> References: <20240612124056.39230-1-quic_sibis@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: S7dxKm4lajA2-nYTKUqws7L5T7n3qbFD X-Proofpoint-ORIG-GUID: S7dxKm4lajA2-nYTKUqws7L5T7n3qbFD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-12_06,2024-06-12_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 bulkscore=0 malwarescore=0 impostorscore=0 suspectscore=0 adultscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=968 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406120092 Add the cpucp mailbox and sram nodes required by SCMI perf protocol on X1E80100 SoCs. Signed-off-by: Sibi Sankar --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 28ae10c24a5f..7b619db07694 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5116,6 +5116,13 @@ gic_its: msi-controller@17040000 { }; }; + cpucp_mbox: mailbox@17430000 { + compatible = "qcom,x1e80100-cpucp-mbox"; + reg = <0 0x17430000 0 0x10000>, <0 0x18830000 0 0x10000>; + interrupts = ; + #mbox-cells = <1>; + }; + apps_rsc: rsc@17500000 { compatible = "qcom,rpmh-rsc"; reg = <0 0x17500000 0 0x10000>, @@ -5299,6 +5306,25 @@ frame@1780d000 { }; }; + sram: sram@18b4e000 { + compatible = "mmio-sram"; + reg = <0x0 0x18b4e000 0x0 0x400>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x18b4e000 0x400>; + + cpu_scp_lpri0: scp-sram-section@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x200>; + }; + + cpu_scp_lpri1: scp-sram-section@200 { + compatible = "arm,scmi-shmem"; + reg = <0x200 0x200>; + }; + }; + system-cache-controller@25000000 { compatible = "qcom,x1e80100-llcc"; reg = <0 0x25000000 0 0x200000>,