| Message ID | 20240618092711.15037-1-quic_kbajaj@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v3] arm64: dts: qcom: qdu1000: Add secure qfprom node | expand |
On Tue, Jun 18, 2024 at 02:57:11PM GMT, Komal Bajaj wrote: > Add secure qfprom node and also add properties for multi channel > DDR. This is required for LLCC driver to pick the correct LLCC > configuration. > > Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- > Changes in v3: > * Addressed comment by Konrad Which comment? Please be more specific in changelogs (no need to resend just for this issue, just keep it in mind for the future submissions). > * Added Fixes tag in commit message as suggested by Dmitry > * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@quicinc.com/ > > Changes in v2: > * Minor correction in commit message > * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 6/18/24 11:27, Komal Bajaj wrote: > Add secure qfprom node and also add properties for multi channel > DDR. This is required for LLCC driver to pick the correct LLCC > configuration. > > Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Tue, Jun 18, 2024 at 02:57:11PM +0530, Komal Bajaj wrote: > Add secure qfprom node and also add properties for multi channel > DDR. This is required for LLCC driver to pick the correct LLCC > configuration. > > Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- > Changes in v3: > * Addressed comment by Konrad > * Added Fixes tag in commit message as suggested by Dmitry > * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@quicinc.com/ > > Changes in v2: > * Minor correction in commit message > * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > index 7a77f7a55498..27f9fc87079c 100644 > --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi > +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 { > reg-names = "llcc0_base", > "llcc_broadcast_base"; > interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; > + > + nvmem-cells = <&multi_chan_ddr>; > + nvmem-cell-names = "multi-chan-ddr"; > + }; > + > + sec_qfprom: efuse@221c8000 { > + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; > + reg = <0 0x221c8000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + multi_chan_ddr: multi-chan-ddr@12b { > + reg = <0x12b 0x1>; > + bits = <0 2>; > + }; LGTM, without this change, LLCC driver for QDU1000 will result in probe failure. Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> -Mukesh > }; > }; > > -- > 2.42.0 > >
On Wed, Jun 19, 2024 at 12:08:13AM +0530, Mukesh Ojha wrote: > On Tue, Jun 18, 2024 at 02:57:11PM +0530, Komal Bajaj wrote: > > Add secure qfprom node and also add properties for multi channel > > DDR. This is required for LLCC driver to pick the correct LLCC > > configuration. > > > > Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > > --- > > Changes in v3: > > * Addressed comment by Konrad > > * Added Fixes tag in commit message as suggested by Dmitry > > * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@quicinc.com/ > > > > Changes in v2: > > * Minor correction in commit message > > * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@quicinc.com/ > > --- > > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > > index 7a77f7a55498..27f9fc87079c 100644 > > --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi > > +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > > @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 { > > reg-names = "llcc0_base", > > "llcc_broadcast_base"; > > interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; > > + > > + nvmem-cells = <&multi_chan_ddr>; > > + nvmem-cell-names = "multi-chan-ddr"; > > + }; > > + > > + sec_qfprom: efuse@221c8000 { > > + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; > > + reg = <0 0x221c8000 0 0x1000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + multi_chan_ddr: multi-chan-ddr@12b { > > + reg = <0x12b 0x1>; > > + bits = <0 2>; > > + }; > > LGTM, without this change, LLCC driver for QDU1000 will result in probe failure. > > Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Just noticed, sec_qfprom driver config CONFIG_NVMEM_QCOM_SEC_QFPROM, still need to be enabled. -Mukesh
On 6/19/2024 3:42 PM, Mukesh Ojha wrote: > On Wed, Jun 19, 2024 at 12:08:13AM +0530, Mukesh Ojha wrote: >> On Tue, Jun 18, 2024 at 02:57:11PM +0530, Komal Bajaj wrote: >>> Add secure qfprom node and also add properties for multi channel >>> DDR. This is required for LLCC driver to pick the correct LLCC >>> configuration. >>> >>> Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") >>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> >>> --- >>> Changes in v3: >>> * Addressed comment by Konrad >>> * Added Fixes tag in commit message as suggested by Dmitry >>> * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@quicinc.com/ >>> >>> Changes in v2: >>> * Minor correction in commit message >>> * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@quicinc.com/ >>> --- >>> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ >>> 1 file changed, 15 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi >>> index 7a77f7a55498..27f9fc87079c 100644 >>> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi >>> @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 { >>> reg-names = "llcc0_base", >>> "llcc_broadcast_base"; >>> interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; >>> + >>> + nvmem-cells = <&multi_chan_ddr>; >>> + nvmem-cell-names = "multi-chan-ddr"; >>> + }; >>> + >>> + sec_qfprom: efuse@221c8000 { >>> + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; >>> + reg = <0 0x221c8000 0 0x1000>; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + >>> + multi_chan_ddr: multi-chan-ddr@12b { >>> + reg = <0x12b 0x1>; >>> + bits = <0 2>; >>> + }; >> >> LGTM, without this change, LLCC driver for QDU1000 will result in probe failure. >> >> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> > > Just noticed, sec_qfprom driver config CONFIG_NVMEM_QCOM_SEC_QFPROM, still > need to be enabled. Thanks Mukesh for pointing out this. Posted the change to enable CONFIG_NVMEM_QCOM_SEC_QFPROM [1]. [1]https://lore.kernel.org/linux-arm-msm/20240619105642.18947-1-quic_kbajaj@quicinc.com/ Thanks Komal > > -Mukesh
On Tue, 18 Jun 2024 14:57:11 +0530, Komal Bajaj wrote: > Add secure qfprom node and also add properties for multi channel > DDR. This is required for LLCC driver to pick the correct LLCC > configuration. > > Applied, thanks! [1/1] arm64: dts: qcom: qdu1000: Add secure qfprom node commit: 367fb3f0aaa6eac9101dc683dd27c268b4cc702e Best regards,
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 7a77f7a55498..27f9fc87079c 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 { reg-names = "llcc0_base", "llcc_broadcast_base"; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; + + nvmem-cells = <&multi_chan_ddr>; + nvmem-cell-names = "multi-chan-ddr"; + }; + + sec_qfprom: efuse@221c8000 { + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; + reg = <0 0x221c8000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + multi_chan_ddr: multi-chan-ddr@12b { + reg = <0x12b 0x1>; + bits = <0 2>; + }; }; };
Add secure qfprom node and also add properties for multi channel DDR. This is required for LLCC driver to pick the correct LLCC configuration. Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> --- Changes in v3: * Addressed comment by Konrad * Added Fixes tag in commit message as suggested by Dmitry * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@quicinc.com/ Changes in v2: * Minor correction in commit message * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@quicinc.com/ --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.42.0