| Message ID | 20240619-rb2-fixes-v1-1-1d2b1d711969@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | qcom: dts: qrb4210-rb2 usb/emmc fixes | expand |
On Wed, 19 Jun 2024 at 23:33, Caleb Connolly <caleb.connolly@linaro.org> wrote: > > The first SDHC can do DMA like most other peripherals, add the missing > iommus entry which is required to set this up. > > This may have been working on Linux before since the bootloader > configures it and it may not be full torn down. But other software like > U-Boot needs this to initialize the eMMC properly. > > Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi") > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm6115.dtsi | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index aca0a87092e4..9ed062150aaf 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1089,8 +1089,9 @@ sdhc_1: mmc@4744000 { clock-names = "iface", "core", "xo", "ice"; power-domains = <&rpmpd SM6115_VDDCX>; operating-points-v2 = <&sdhc1_opp_table>; + iommus = <&apps_smmu 0x00c0 0x0>; interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>;
The first SDHC can do DMA like most other peripherals, add the missing iommus entry which is required to set this up. This may have been working on Linux before since the bootloader configures it and it may not be full torn down. But other software like U-Boot needs this to initialize the eMMC properly. Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi") Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 1 + 1 file changed, 1 insertion(+)