| Message ID | 20240621-sm8350-gpucc-fixes-v1-1-22db60c7c5d3@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 313e2909023bef36ef7b6d1d9ff2d98febcaa28d |
| Headers | show |
| Series | clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable | expand |
On Fri, Jun 21, 2024 at 05:34:23PM GMT, Taniya Das wrote: > The RCG's clk src has to be parked at XO while disabling as per the > HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. > > Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC") > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > --- > drivers/clk/qcom/gpucc-sm8350.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8350-HDK Thank you!
On Fri, 21 Jun 2024 17:34:23 +0530, Taniya Das wrote: > The RCG's clk src has to be parked at XO while disabling as per the > HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. > > Applied, thanks! [1/1] clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable commit: 313e2909023bef36ef7b6d1d9ff2d98febcaa28d Best regards,
diff --git a/drivers/clk/qcom/gpucc-sm8350.c b/drivers/clk/qcom/gpucc-sm8350.c index f6bb8244dd40..f3b6bdc24485 100644 --- a/drivers/clk/qcom/gpucc-sm8350.c +++ b/drivers/clk/qcom/gpucc-sm8350.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Linaro Limited + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> @@ -147,7 +148,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { .parent_data = gpu_cc_parent_data_0, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -169,7 +170,7 @@ static struct clk_rcg2 gpu_cc_hub_clk_src = { .parent_data = gpu_cc_parent_data_1, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, };
The RCG's clk src has to be parked at XO while disabling as per the HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC") Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- drivers/clk/qcom/gpucc-sm8350.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) --- base-commit: b992b79ca8bc336fa8e2c80990b5af80ed8f36fd change-id: 20240621-sm8350-gpucc-fixes-5d3ba4dda230 Best regards,