| Message ID | 20240723075948.9545-1-quic_qqzhou@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2] arm64: dts: qcom: sa8775p: Mark APPS and PCIe SMMUs as DMA coherent | expand |
On 23/07/2024 09:59, Qingqing Zhou wrote: > The SMMUs on sa8775p are cache-coherent. GPU SMMU is marked as such, > mark the APPS and PCIe ones as well. > > Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride") > Fixes: 2dba7a613a6e ("arm64: dts: qcom: sa8775p: add the pcie smmu node") > For the future: there is never, never a line break between tags. > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Best regards, Krzysztof
在 7/23/2024 4:12 PM, Krzysztof Kozlowski 写道: > On 23/07/2024 09:59, Qingqing Zhou wrote: >> The SMMUs on sa8775p are cache-coherent. GPU SMMU is marked as such, >> mark the APPS and PCIe ones as well. >> >> Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride") >> Fixes: 2dba7a613a6e ("arm64: dts: qcom: sa8775p: add the pcie smmu node") >> > > For the future: there is never, never a line break between tags. OK, thanks for reviewing and sorry for this, will update in next version. > >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Best regards, > Krzysztof >
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 23f1b2e5e624..95691ab58a23 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3070,6 +3070,7 @@ reg = <0x0 0x15000000 0x0 0x100000>; #iommu-cells = <2>; #global-interrupts = <2>; + dma-coherent; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, @@ -3208,6 +3209,7 @@ reg = <0x0 0x15200000 0x0 0x80000>; #iommu-cells = <2>; #global-interrupts = <2>; + dma-coherent; interrupts = <GIC_SPI 920 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 921 IRQ_TYPE_LEVEL_HIGH>,
The SMMUs on sa8775p are cache-coherent. GPU SMMU is marked as such, mark the APPS and PCIe ones as well. Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride") Fixes: 2dba7a613a6e ("arm64: dts: qcom: sa8775p: add the pcie smmu node") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> --- Changes in v2: - Add the Fixes tags. - Update the commit message. - Link to v1: https://lore.kernel.org/lkml/20240715071649.25738-1-quic_qqzhou@quicinc.com/ --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++ 1 file changed, 2 insertions(+)