| Message ID | 20240814-lpass-v1-1-a5bb8f9dfa8b@freebox.fr (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Add LPASS SMMU to msm8998 DTSI | expand |
On Wed, Aug 14, 2024 at 06:20:22PM +0200, Marc Gonzalez wrote: > From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > > Add definitions for the Q6 BIMC, LPASS core and adsp smmu clocks, > required to enable audio functionality on MSM8998. > > Add the GDSC definitions for the LPASS_ADSP_GDSC and LPASS_CORE_GDSC > as a final step to enable the required clock tree for the lpass iommu > and for the audio dsp itself. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Acked-by: Conor Dooley <conor.dooley@microchip.com>
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h index b5456a64d4213..5b0dde0809007 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8998.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h @@ -193,10 +193,15 @@ #define GCC_MMSS_GPLL0_DIV_CLK 184 #define GCC_GPU_GPLL0_DIV_CLK 185 #define GCC_GPU_GPLL0_CLK 186 +#define HLOS1_VOTE_LPASS_CORE_SMMU_CLK 187 +#define HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 188 +#define GCC_MSS_Q6_BIMC_AXI_CLK 189 #define PCIE_0_GDSC 0 #define UFS_GDSC 1 #define USB_30_GDSC 2 +#define LPASS_ADSP_GDSC 3 +#define LPASS_CORE_GDSC 4 #define GCC_BLSP1_QUP1_BCR 0 #define GCC_BLSP1_QUP2_BCR 1