diff mbox series

[09/21] drm/msm/dpu: request more mixer for 4K+ DSC case

Message ID 20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-9-bdb05b4b5a2e@linaro.org (mailing list archive)
State Not Applicable
Headers show
Series drm/msm: Support quad pipe with dual-DSI | expand

Commit Message

Jun Nie Aug. 29, 2024, 10:17 a.m. UTC
request more mixer for the case that hdisplay exceeding 4096
and DSC enabled.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

Comments

Dmitry Baryshkov Aug. 29, 2024, 11:11 a.m. UTC | #1
On Thu, 29 Aug 2024 at 13:20, Jun Nie <jun.nie@linaro.org> wrote:
>
> request more mixer for the case that hdisplay exceeding 4096
> and DSC enabled.

This doesn't seem to match the code. And it misses the _reason_ to do it.

>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 ++++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 05b203be2a9bc..33cfd94badaba 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -59,6 +59,7 @@
>  #define IDLE_SHORT_TIMEOUT     1
>
>  #define MAX_HDISPLAY_SPLIT 1080
> +#define MAX_HDISPLAY_DSC_SPLIT 2560
>
>  /* timeout in frames waiting for frame done */
>  #define DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES 5
> @@ -588,15 +589,19 @@ static struct msm_display_topology dpu_encoder_get_topology(
>
>         /* Datapath topology selection
>          *
> -        * Dual display
> +        * Dual display without DSC
>          * 2 LM, 2 INTF ( Split display using 2 interfaces)
>          *
> +        * Dual display with DSC
> +        * 4 LM, 2 INTF ( Split display using 2 interfaces)

This doesn't match the code

> +        *
>          * Single display
>          * 1 LM, 1 INTF
>          * 2 LM, 1 INTF (stream merge to support high resolution interfaces)
>          *
>          * Add dspps to the reservation requirements if ctm is requested
>          */
> +
>         if (intf_count == 2)
>                 topology.num_lm = 2;
>         else if (!dpu_kms->catalog->caps->has_3d_merge)
> @@ -615,10 +620,21 @@ static struct msm_display_topology dpu_encoder_get_topology(
>                  * 2 DSC encoders, 2 layer mixers and 1 interface
>                  * this is power optimal and can drive up to (including) 4k
>                  * screens
> +                * But for dual display with hdisplay exceeding 4096, we need
> +                * 4 layer mixer. Because DSC has a max width of 2048 and
> +                * a single plane can only be used by one mixer pair
>                  */
> -               topology.num_dsc = 2;
> -               topology.num_lm = 2;
> -               topology.num_intf = 1;
> +
> +               if (intf_count == 2 &&
> +                   mode->hdisplay > MAX_HDISPLAY_DSC_SPLIT) {
> +                       topology.num_dsc = 4;
> +                       topology.num_lm = 4;
> +                       topology.num_intf = 2;
> +               } else {
> +                       topology.num_dsc = 2;
> +                       topology.num_lm = 2;
> +                       topology.num_intf = 1;
> +               }
>         }
>
>         return topology;
>
> --
> 2.34.1
>
Jun Nie Sept. 3, 2024, 7:49 a.m. UTC | #2
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2024年8月29日周四 19:12写道:
>
> On Thu, 29 Aug 2024 at 13:20, Jun Nie <jun.nie@linaro.org> wrote:
> >
> > request more mixer for the case that hdisplay exceeding 4096
> > and DSC enabled.
>
> This doesn't seem to match the code. And it misses the _reason_ to do it.

Right. The DSC limitation should be 2560. And the reason is to support 4:4:2
quad-pipe topology. Because we prefer to use 4 layer mixer for dual DSI case.
The resolution is always higher and more DSC is power optimal. That's my
understanding.

> >
> > Signed-off-by: Jun Nie <jun.nie@linaro.org>
> > ---
> >  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 ++++++++++++++++++++----
> >  1 file changed, 20 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > index 05b203be2a9bc..33cfd94badaba 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > @@ -59,6 +59,7 @@
> >  #define IDLE_SHORT_TIMEOUT     1
> >
> >  #define MAX_HDISPLAY_SPLIT 1080
> > +#define MAX_HDISPLAY_DSC_SPLIT 2560
> >
> >  /* timeout in frames waiting for frame done */
> >  #define DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES 5
> > @@ -588,15 +589,19 @@ static struct msm_display_topology dpu_encoder_get_topology(
> >
> >         /* Datapath topology selection
> >          *
> > -        * Dual display
> > +        * Dual display without DSC
> >          * 2 LM, 2 INTF ( Split display using 2 interfaces)
> >          *
> > +        * Dual display with DSC
> > +        * 4 LM, 2 INTF ( Split display using 2 interfaces)
>
> This doesn't match the code
>
Yeah, just use 4:4:2 case for DSC+dualDSI case is a simpler logic. I
can skip the DSC limitation
test in next version.
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 05b203be2a9bc..33cfd94badaba 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -59,6 +59,7 @@ 
 #define IDLE_SHORT_TIMEOUT	1
 
 #define MAX_HDISPLAY_SPLIT 1080
+#define MAX_HDISPLAY_DSC_SPLIT 2560
 
 /* timeout in frames waiting for frame done */
 #define DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES 5
@@ -588,15 +589,19 @@  static struct msm_display_topology dpu_encoder_get_topology(
 
 	/* Datapath topology selection
 	 *
-	 * Dual display
+	 * Dual display without DSC
 	 * 2 LM, 2 INTF ( Split display using 2 interfaces)
 	 *
+	 * Dual display with DSC
+	 * 4 LM, 2 INTF ( Split display using 2 interfaces)
+	 *
 	 * Single display
 	 * 1 LM, 1 INTF
 	 * 2 LM, 1 INTF (stream merge to support high resolution interfaces)
 	 *
 	 * Add dspps to the reservation requirements if ctm is requested
 	 */
+
 	if (intf_count == 2)
 		topology.num_lm = 2;
 	else if (!dpu_kms->catalog->caps->has_3d_merge)
@@ -615,10 +620,21 @@  static struct msm_display_topology dpu_encoder_get_topology(
 		 * 2 DSC encoders, 2 layer mixers and 1 interface
 		 * this is power optimal and can drive up to (including) 4k
 		 * screens
+		 * But for dual display with hdisplay exceeding 4096, we need
+		 * 4 layer mixer. Because DSC has a max width of 2048 and
+		 * a single plane can only be used by one mixer pair
 		 */
-		topology.num_dsc = 2;
-		topology.num_lm = 2;
-		topology.num_intf = 1;
+
+		if (intf_count == 2 &&
+		    mode->hdisplay > MAX_HDISPLAY_DSC_SPLIT) {
+			topology.num_dsc = 4;
+			topology.num_lm = 4;
+			topology.num_intf = 2;
+		} else {
+			topology.num_dsc = 2;
+			topology.num_lm = 2;
+			topology.num_intf = 1;
+		}
 	}
 
 	return topology;