Message ID | 20241008112516.17702-3-quic_mukhopad@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Enable Display Port for Qualcomm SA8775P-ride platform | expand |
On Tue, Oct 08, 2024 at 04:55:16PM GMT, Soutrik Mukhopadhyay wrote: > Enable DPTX0 and DPTX1 along with their corresponding PHYs for > sa8775p-ride platform. What is connected to those DP lanes? If they are routed directly to the DisplayPort connectors, please add corresponding devices (see dp-connector). > > Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 54 ++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > >
On 10/8/2024 5:46 PM, Dmitry Baryshkov wrote: > On Tue, Oct 08, 2024 at 04:55:16PM GMT, Soutrik Mukhopadhyay wrote: >> Enable DPTX0 and DPTX1 along with their corresponding PHYs for >> sa8775p-ride platform. > What is connected to those DP lanes? If they are routed directly to the > DisplayPort connectors, please add corresponding devices (see > dp-connector). We are defining the functionality of gpio101 and gpio102 as "edp0_hot" and "edp1_hot" respectively. This ensures that the hot plug will be directly routed via the display interrupt line "mdss0" to the display port driver and no external dependencies on dp-connector is necessary. > >> Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 54 ++++++++++++++++++++++ >> 1 file changed, 54 insertions(+) >> >>
On Mon, 28 Oct 2024 at 10:49, Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> wrote: > > > On 10/8/2024 5:46 PM, Dmitry Baryshkov wrote: > > On Tue, Oct 08, 2024 at 04:55:16PM GMT, Soutrik Mukhopadhyay wrote: > >> Enable DPTX0 and DPTX1 along with their corresponding PHYs for > >> sa8775p-ride platform. > > What is connected to those DP lanes? If they are routed directly to the > > DisplayPort connectors, please add corresponding devices (see > > dp-connector). > > > We are defining the functionality of gpio101 and gpio102 as "edp0_hot" > and "edp1_hot" > > respectively. This ensures that the hot plug will be directly routed via > the display interrupt > > line "mdss0" to the display port driver and no external dependencies on > dp-connector is > > necessary. Please describe the hardware, not the driver necessities. If the board has a DP connector, please add the node. E.g. it allows one to specify the label and the type used by the connector. Also could you please fix your email client so that you don't have strange/unnecessary line wraps and empty lines?
On 10/28/2024 3:15 PM, Dmitry Baryshkov wrote: > On Mon, 28 Oct 2024 at 10:49, Soutrik Mukhopadhyay > <quic_mukhopad@quicinc.com> wrote: >> >> On 10/8/2024 5:46 PM, Dmitry Baryshkov wrote: >>> On Tue, Oct 08, 2024 at 04:55:16PM GMT, Soutrik Mukhopadhyay wrote: >>>> Enable DPTX0 and DPTX1 along with their corresponding PHYs for >>>> sa8775p-ride platform. >>> What is connected to those DP lanes? If they are routed directly to the >>> DisplayPort connectors, please add corresponding devices (see >>> dp-connector). >> >> We are defining the functionality of gpio101 and gpio102 as "edp0_hot" >> and "edp1_hot" >> >> respectively. This ensures that the hot plug will be directly routed via >> the display interrupt >> >> line "mdss0" to the display port driver and no external dependencies on >> dp-connector is >> >> necessary. > Please describe the hardware, not the driver necessities. > If the board has a DP connector, please add the node. E.g. it allows > one to specify the label and the type used by the connector. > > Also could you please fix your email client so that you don't have > strange/unnecessary line wraps and empty lines? Addition of DP connector node with the hpd-gpio property does not allow hpd to be detected since the gpio 101/102 have the "edp0_hot" as function. If the hpd-gpio property is removed from the DP connector node, the probe of DP connector will fail. >
On Tue, 29 Oct 2024 at 08:08, Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> wrote: > > > On 10/28/2024 3:15 PM, Dmitry Baryshkov wrote: > > On Mon, 28 Oct 2024 at 10:49, Soutrik Mukhopadhyay > > <quic_mukhopad@quicinc.com> wrote: > >> > >> On 10/8/2024 5:46 PM, Dmitry Baryshkov wrote: > >>> On Tue, Oct 08, 2024 at 04:55:16PM GMT, Soutrik Mukhopadhyay wrote: > >>>> Enable DPTX0 and DPTX1 along with their corresponding PHYs for > >>>> sa8775p-ride platform. > >>> What is connected to those DP lanes? If they are routed directly to the > >>> DisplayPort connectors, please add corresponding devices (see > >>> dp-connector). > >> > >> We are defining the functionality of gpio101 and gpio102 as "edp0_hot" > >> and "edp1_hot" > >> > >> respectively. This ensures that the hot plug will be directly routed via > >> the display interrupt > >> > >> line "mdss0" to the display port driver and no external dependencies on > >> dp-connector is > >> > >> necessary. > > Please describe the hardware, not the driver necessities. > > If the board has a DP connector, please add the node. E.g. it allows > > one to specify the label and the type used by the connector. > > > > Also could you please fix your email client so that you don't have > > strange/unnecessary line wraps and empty lines? > > Addition of DP connector node with the hpd-gpio property does not allow > hpd to be detected since the gpio > > 101/102 have the "edp0_hot" as function. If the hpd-gpio property is > removed from the DP connector node, > > the probe of DP connector will fail. No, it wont. It uses devm_gpiod_get_optional(). And if it does fail, it is a bug which needs to be fixed. And please, fix your email client so that it doesn't insert stray empty lines.
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi index adb71aeff339..5a38de918024 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi @@ -421,6 +421,48 @@ status = "okay"; }; +&mdss0 { + status = "okay"; +}; + +&mdss0_dp0 { + status = "okay"; + + pinctrl-0 = <&dp0_hot_plug_det>; + pinctrl-names = "default"; +}; + +&mdss0_dp0_out { + data-lanes = <0 1 2 3>; + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; +}; + +&mdss0_dp0_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l4a>; +}; + +&mdss0_dp1 { + status = "okay"; + + pinctrl-0 = <&dp1_hot_plug_det>; + pinctrl-names = "default"; +}; + +&mdss0_dp1_out { + data-lanes = <0 1 2 3>; + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; +}; + +&mdss0_dp1_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l4a>; +}; + &pmm8654au_0_gpios { gpio-line-names = "DS_EN", "POFF_COMPLETE", @@ -527,6 +569,18 @@ }; &tlmm { + dp0_hot_plug_det: dp0-hot-plug-det-state { + pins = "gpio101"; + function = "edp0_hot"; + bias-disable; + }; + + dp1_hot_plug_det: dp1-hot-plug-det-state { + pins = "gpio102"; + function = "edp1_hot"; + bias-disable; + }; + ethernet0_default: ethernet0-default-state { ethernet0_mdc: ethernet0-mdc-pins { pins = "gpio8";
Enable DPTX0 and DPTX1 along with their corresponding PHYs for sa8775p-ride platform. Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+)