| Message ID | 20241011-add_llcc_dts_node_for_qcs615-v1-1-e7aa45244c36@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: qcs615: Add LLCC support for QCS615 | expand |
On 11.10.2024 12:41 PM, Song Xue wrote: > The QCS615 platform has LLCC(Last Level Cache Controller) as the system > cache controller. It includes 1 LLCC instance and 1 LLCC broadcast > interface. > > Add LLCC node support for the QCS615 platform. > > Signed-off-by: Song Xue <quic_songxue@quicinc.com> > --- > This patch series depends on below patch series: > https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ > https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > index ac4c4c751da1fbb28865877555ba317677bc6bd2..b718a4d2270d64ed43c2eca078bfe52b78ff680c 100644 > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > @@ -495,6 +495,14 @@ dc_noc: interconnect@9160000 { > qcom,bcm-voters = <&apps_bcm_voter>; > }; > > + llcc: system-cache-controller@9200000 { > + compatible = "qcom,qcs615-llcc"; > + reg = <0x0 0x9200000 0x0 0x50000>, > + <0x0 0x9600000 0x0 0x50000>; Please pad both addresses to 8 hex digits (e.g. 0x09200000) With that: Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
On 10/26/2024 1:46 AM, Konrad Dybcio wrote: > On 11.10.2024 12:41 PM, Song Xue wrote: >> The QCS615 platform has LLCC(Last Level Cache Controller) as the system >> cache controller. It includes 1 LLCC instance and 1 LLCC broadcast >> interface. >> >> Add LLCC node support for the QCS615 platform. >> >> Signed-off-by: Song Xue <quic_songxue@quicinc.com> >> --- >> This patch series depends on below patch series: >> https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ >> https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@quicinc.com/ >> --- >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> index ac4c4c751da1fbb28865877555ba317677bc6bd2..b718a4d2270d64ed43c2eca078bfe52b78ff680c 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> @@ -495,6 +495,14 @@ dc_noc: interconnect@9160000 { >> qcom,bcm-voters = <&apps_bcm_voter>; >> }; >> >> + llcc: system-cache-controller@9200000 { >> + compatible = "qcom,qcs615-llcc"; >> + reg = <0x0 0x9200000 0x0 0x50000>, >> + <0x0 0x9600000 0x0 0x50000>; > > Please pad both addresses to 8 hex digits (e.g. 0x09200000) > > With that: > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > > Konrad > let me fix it. Thanks, Song
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index ac4c4c751da1fbb28865877555ba317677bc6bd2..b718a4d2270d64ed43c2eca078bfe52b78ff680c 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -495,6 +495,14 @@ dc_noc: interconnect@9160000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + llcc: system-cache-controller@9200000 { + compatible = "qcom,qcs615-llcc"; + reg = <0x0 0x9200000 0x0 0x50000>, + <0x0 0x9600000 0x0 0x50000>; + reg-names = "llcc0_base", + "llcc_broadcast_base"; + }; + gem_noc: interconnect@9680000 { reg = <0x0 0x9680000 0x0 0x3e200>; compatible = "qcom,qcs615-gem-noc";
The QCS615 platform has LLCC(Last Level Cache Controller) as the system cache controller. It includes 1 LLCC instance and 1 LLCC broadcast interface. Add LLCC node support for the QCS615 platform. Signed-off-by: Song Xue <quic_songxue@quicinc.com> --- This patch series depends on below patch series: https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@quicinc.com/ --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) --- base-commit: b6270c3bca987530eafc6a15f9d54ecd0033e0e3 change-id: 20241011-add_llcc_dts_node_for_qcs615-b2a5da550ba5 prerequisite-change-id: 20240924-add_initial_support_for_qcs615-a01bb2dd4650:v3 prerequisite-patch-id: 09782474af7eecf1013425fd34f9d2f082fb3616 prerequisite-patch-id: 624720e543d7857e46d3ee49b8cea413772deb4c prerequisite-patch-id: 04ca722967256efddc402b7bab94136a5174b0b9 prerequisite-patch-id: ab88a42ec69ad90e8509c9c5b7c6bdd595a7f783 prerequisite-patch-id: 918724fafe43acaa4c4b980bfabe36e9c3212cd1 prerequisite-patch-id: 91cb230c6d129ff21c24d124fad9e37a66cb6a22 prerequisite-patch-id: 57afeee80c9aa069ee243f5a5b634702867d20f1 prerequisite-change-id: 20241009-add_llcc_support_for_qcs615-6685f5c031b3:v2 prerequisite-patch-id: 7f93f240f926884c60a86c3ca651bb2232b88bed prerequisite-patch-id: 6758ca439e10ac057d7834bb42860eb58198287b Best regards,