| Message ID | 20241014194825.44406-2-danila@jiaxyga.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | f92dbc3807a92f08c5450e024e90651322ca6566 |
| Headers | show |
| Series | Add Qualcomm Adreno 642L speedbin and update SC7280 OPPs | expand |
On Mon, Oct 14, 2024 at 10:48:25PM +0300, Danila Tikhonov wrote: > From: Eugene Lepshy <fekz115@gmail.com> > > A642L (speedbin 0x81) uses index 4, so this commit sets the fourth bit > for A642L supported opps. > > Signed-off-by: Eugene Lepshy <fekz115@gmail.com> > Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index b41230651def..7c75340b3a46 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2841,14 +2841,14 @@ opp-315000000 { opp-hz = /bits/ 64 <315000000>; opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; opp-peak-kBps = <1804000>; - opp-supported-hw = <0x07>; + opp-supported-hw = <0x17>; }; opp-450000000 { opp-hz = /bits/ 64 <450000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS>; opp-peak-kBps = <4068000>; - opp-supported-hw = <0x07>; + opp-supported-hw = <0x17>; }; /* Only applicable for SKUs which has 550Mhz as Fmax */ @@ -2863,14 +2863,14 @@ opp-550000000-1 { opp-hz = /bits/ 64 <550000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; opp-peak-kBps = <6832000>; - opp-supported-hw = <0x06>; + opp-supported-hw = <0x16>; }; opp-608000000 { opp-hz = /bits/ 64 <608000000>; opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>; opp-peak-kBps = <8368000>; - opp-supported-hw = <0x06>; + opp-supported-hw = <0x16>; }; opp-700000000 {