diff mbox series

[v3,4/5] arm64: dts: qcom: x1e80100-crd: add rtc offset to set rtc time

Message ID 20241015004945.3676-5-jonathan@marek.ca (mailing list archive)
State New
Headers show
Series x1e80100 RTC support | expand

Commit Message

Jonathan Marek Oct. 15, 2024, 12:47 a.m. UTC
See commit e67b45582c5e for explanation.

Note: the 0xbc offset is arbitrary, it just needs to not be already in use.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Johan Hovold Oct. 16, 2024, 6:51 a.m. UTC | #1
On Mon, Oct 14, 2024 at 08:47:29PM -0400, Jonathan Marek wrote:
> See commit e67b45582c5e for explanation.

It's good that you reference commit e67b45582c5e ("arm64: dts: qcom:
sc8280xp-crd: enable rtc") but your commit message still needs to be
self-contained and provide the explanation here in some form (e.g.
quoted or paraphrased).

Also spell out the commit summary in parenthesis when referring to
commits as I did above.

> Note: the 0xbc offset is arbitrary, it just needs to not be already in use.

How did you verify that nothing is using this offset on this platform? I
assume we need someone with access to the docs to make sure it's not in
use as we did for sc8280xp.

Johan
Jonathan Marek Oct. 16, 2024, 1:31 p.m. UTC | #2
On 10/16/24 2:51 AM, Johan Hovold wrote:
> On Mon, Oct 14, 2024 at 08:47:29PM -0400, Jonathan Marek wrote:
>> See commit e67b45582c5e for explanation.
> 
> It's good that you reference commit e67b45582c5e ("arm64: dts: qcom:
> sc8280xp-crd: enable rtc") but your commit message still needs to be
> self-contained and provide the explanation here in some form (e.g.
> quoted or paraphrased).
> 
> Also spell out the commit summary in parenthesis when referring to
> commits as I did above.
> 
>> Note: the 0xbc offset is arbitrary, it just needs to not be already in use.
> 
> How did you verify that nothing is using this offset on this platform? I
> assume we need someone with access to the docs to make sure it's not in
> use as we did for sc8280xp.
> 

AFAIK qcom allocate things from the start of the SDAM, so allocating 
from the end of the SDAM should be safe. And AFAIK this is supposed to 
be a general purpose HLOS (linux/windows) SDAM block, so should be 
mostly free to use.

(its possible windows uses this offset for something, I don't know about 
that)
Johan Hovold Oct. 18, 2024, 9:44 a.m. UTC | #3
On Wed, Oct 16, 2024 at 09:31:00AM -0400, Jonathan Marek wrote:
> On 10/16/24 2:51 AM, Johan Hovold wrote:
> > On Mon, Oct 14, 2024 at 08:47:29PM -0400, Jonathan Marek wrote:

> >> Note: the 0xbc offset is arbitrary, it just needs to not be already in use.
> > 
> > How did you verify that nothing is using this offset on this platform? I
> > assume we need someone with access to the docs to make sure it's not in
> > use as we did for sc8280xp.
>
> AFAIK qcom allocate things from the start of the SDAM, so allocating 
> from the end of the SDAM should be safe. And AFAIK this is supposed to 
> be a general purpose HLOS (linux/windows) SDAM block, so should be 
> mostly free to use.

From what I understand these registers are also used for things like
programmable LEDs (e.g. see 24e2d05d1b68 ("leds: Add driver for Qualcomm
LPG")). And who knows what else.

It would be good if someone from Qualcomm could confirm that these bytes
are free for use before merging. I've started asking around.

Johan
Konrad Dybcio Oct. 31, 2024, 8:09 p.m. UTC | #4
On 15.10.2024 2:47 AM, Jonathan Marek wrote:
> See commit e67b45582c5e for explanation.
> 
> Note: the 0xbc offset is arbitrary, it just needs to not be already in use.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> index 6dfc85eda3540..eb6b735c41453 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> @@ -1224,6 +1224,17 @@ edp_bl_en: edp-bl-en-state {
>  	};
>  };
>  
> +&pmk8550_rtc {
> +	nvmem-cells = <&rtc_offset>;
> +	nvmem-cell-names = "offset";
> +};
> +
> +&pmk8550_sdam_2 {
> +	rtc_offset: rtc-offset@bc {
> +		reg = <0xbc 0x4>;
> +	};
> +};

Setting random bits in SDAM is a very very very very bad idea

I'll try to get a good spot for the offset internally

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
index 6dfc85eda3540..eb6b735c41453 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
@@ -1224,6 +1224,17 @@  edp_bl_en: edp-bl-en-state {
 	};
 };
 
+&pmk8550_rtc {
+	nvmem-cells = <&rtc_offset>;
+	nvmem-cell-names = "offset";
+};
+
+&pmk8550_sdam_2 {
+	rtc_offset: rtc-offset@bc {
+		reg = <0xbc 0x4>;
+	};
+};
+
 &qupv3_0 {
 	status = "okay";
 };