Message ID | 20241024131101.13587-2-johan+linaro@kernel.org (mailing list archive) |
---|---|
State | Accepted, archived |
Commit | f3bba5eb46ddb8f460fc808a65050a9bf2f7ef23 |
Headers | show |
Series | arm64: dts: qcom: x1e80100: fix PCIe interconnects | expand |
On 24.10.2024 3:10 PM, Johan Hovold wrote: > The fourth PCIe controller is connected to the PCIe North ANoC. > > Fix the corresponding interconnect property so that the OS manages the > right path. > > Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") > Cc: stable@vger.kernel.org # 6.9 > Cc: Abel Vesa <abel.vesa@linaro.org> > Cc: Sibi Sankar <quic_sibis@quicinc.com> > Cc: Rajendra Nayak <quic_rjendra@quicinc.com> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index b577c4b640dc..ee53cd0aeb95 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -3229,7 +3229,7 @@ pcie4: pci@1c08000 { assigned-clocks = <&gcc GCC_PCIE_4_AUX_CLK>; assigned-clock-rates = <19200000>; - interconnects = <&pcie_south_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS + interconnects = <&pcie_north_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS &cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ALWAYS>;
The fourth PCIe controller is connected to the PCIe North ANoC. Fix the corresponding interconnect property so that the OS manages the right path. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: stable@vger.kernel.org # 6.9 Cc: Abel Vesa <abel.vesa@linaro.org> Cc: Sibi Sankar <quic_sibis@quicinc.com> Cc: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)