| Message ID | 20241025030732.29743-4-quic_qqzhou@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for APPS SMMU on QCS615 | expand |
On Fri, Oct 25, 2024 at 08:37:31AM +0530, Qingqing Zhou wrote: > Add the SCM node for QCS615 platform. It is an interface to > communicate to the secure firmware. > > Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > index ac4c4c751da1..027c5125f36b 100644 > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > @@ -278,6 +278,13 @@ > reg = <0 0x80000000 0 0>; > }; > > + firmware { > + scm { > + compatible = "qcom,scm-qcs615", "qcom,scm"; > + qcom,dload-mode = <&tcsr 0x13000>; No CRYPTO clock? > + }; > + }; > + > camnoc_virt: interconnect-0 { > compatible = "qcom,qcs615-camnoc-virt"; > #interconnect-cells = <2>; > -- > 2.17.1 >
在 10/25/2024 2:02 PM, Dmitry Baryshkov 写道: > On Fri, Oct 25, 2024 at 08:37:31AM +0530, Qingqing Zhou wrote: >> Add the SCM node for QCS615 platform. It is an interface to >> communicate to the secure firmware. >> >> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> index ac4c4c751da1..027c5125f36b 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> @@ -278,6 +278,13 @@ >> reg = <0 0x80000000 0 0>; >> }; >> >> + firmware { >> + scm { >> + compatible = "qcom,scm-qcs615", "qcom,scm"; >> + qcom,dload-mode = <&tcsr 0x13000>; > > No CRYPTO clock? NO, response from Qualcomm clock team is "the current QCS615 RPMH code does not have the clock support for CE clock", so we don't configure clocks here. > >> + }; >> + }; >> + >> camnoc_virt: interconnect-0 { >> compatible = "qcom,qcs615-camnoc-virt"; >> #interconnect-cells = <2>; >> -- >> 2.17.1 >> >
On Wed, Oct 30, 2024 at 04:42:19PM +0800, Qingqing Zhou wrote: > > > 在 10/25/2024 2:02 PM, Dmitry Baryshkov 写道: > > On Fri, Oct 25, 2024 at 08:37:31AM +0530, Qingqing Zhou wrote: > >> Add the SCM node for QCS615 platform. It is an interface to > >> communicate to the secure firmware. > >> > >> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> > >> --- > >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ > >> 1 file changed, 7 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > >> index ac4c4c751da1..027c5125f36b 100644 > >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > >> @@ -278,6 +278,13 @@ > >> reg = <0 0x80000000 0 0>; > >> }; > >> > >> + firmware { > >> + scm { > >> + compatible = "qcom,scm-qcs615", "qcom,scm"; > >> + qcom,dload-mode = <&tcsr 0x13000>; > > > > No CRYPTO clock? > NO, response from Qualcomm clock team is "the current QCS615 RPMH code does not have the clock support for CE clock", so we don't configure clocks here. Is this going to change in future? > > > >> + }; > >> + }; > >> + > >> camnoc_virt: interconnect-0 { > >> compatible = "qcom,qcs615-camnoc-virt"; > >> #interconnect-cells = <2>; > >> -- > >> 2.17.1 > >> > > >
在 11/1/2024 2:59 AM, Dmitry Baryshkov 写道: > On Wed, Oct 30, 2024 at 04:42:19PM +0800, Qingqing Zhou wrote: >> >> >> 在 10/25/2024 2:02 PM, Dmitry Baryshkov 写道: >>> On Fri, Oct 25, 2024 at 08:37:31AM +0530, Qingqing Zhou wrote: >>>> Add the SCM node for QCS615 platform. It is an interface to >>>> communicate to the secure firmware. >>>> >>>> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ >>>> 1 file changed, 7 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> index ac4c4c751da1..027c5125f36b 100644 >>>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >>>> @@ -278,6 +278,13 @@ >>>> reg = <0 0x80000000 0 0>; >>>> }; >>>> >>>> + firmware { >>>> + scm { >>>> + compatible = "qcom,scm-qcs615", "qcom,scm"; >>>> + qcom,dload-mode = <&tcsr 0x13000>; >>> >>> No CRYPTO clock? >> NO, response from Qualcomm clock team is "the current QCS615 RPMH code does not have the clock support for CE clock", so we don't configure clocks here. > > Is this going to change in future? NO, from Qualcomm clock team, the clock/BW is handled internally in our trustzone and do not see any requirement change going forward to move the clocks/BW vote to HLOS driver. > >>> >>>> + }; >>>> + }; >>>> + >>>> camnoc_virt: interconnect-0 { >>>> compatible = "qcom,qcs615-camnoc-virt"; >>>> #interconnect-cells = <2>; >>>> -- >>>> 2.17.1 >>>> >>> >> >
On Mon, Nov 04, 2024 at 03:36:37PM +0800, Qingqing Zhou wrote: > > > 在 11/1/2024 2:59 AM, Dmitry Baryshkov 写道: > > On Wed, Oct 30, 2024 at 04:42:19PM +0800, Qingqing Zhou wrote: > >> > >> > >> 在 10/25/2024 2:02 PM, Dmitry Baryshkov 写道: > >>> On Fri, Oct 25, 2024 at 08:37:31AM +0530, Qingqing Zhou wrote: > >>>> Add the SCM node for QCS615 platform. It is an interface to > >>>> communicate to the secure firmware. > >>>> > >>>> Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> > >>>> --- > >>>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ > >>>> 1 file changed, 7 insertions(+) > >>>> > >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > >>>> index ac4c4c751da1..027c5125f36b 100644 > >>>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > >>>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > >>>> @@ -278,6 +278,13 @@ > >>>> reg = <0 0x80000000 0 0>; > >>>> }; > >>>> > >>>> + firmware { > >>>> + scm { > >>>> + compatible = "qcom,scm-qcs615", "qcom,scm"; > >>>> + qcom,dload-mode = <&tcsr 0x13000>; > >>> > >>> No CRYPTO clock? > >> NO, response from Qualcomm clock team is "the current QCS615 RPMH code does not have the clock support for CE clock", so we don't configure clocks here. > > > > Is this going to change in future? > NO, from Qualcomm clock team, the clock/BW is handled internally in our trustzone and do not see any requirement change going forward to move the clocks/BW vote to HLOS driver. Nit: please wrap your replies at some sensible line length (72-75 chars). Normal email clients do that for you. For the patch itself: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > > >>> > >>>> + }; > >>>> + }; > >>>> + > >>>> camnoc_virt: interconnect-0 { > >>>> compatible = "qcom,qcs615-camnoc-virt"; > >>>> #interconnect-cells = <2>; > >>>> -- > >>>> 2.17.1 > >>>> > >>> > >> > > >
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index ac4c4c751da1..027c5125f36b 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -278,6 +278,13 @@ reg = <0 0x80000000 0 0>; }; + firmware { + scm { + compatible = "qcom,scm-qcs615", "qcom,scm"; + qcom,dload-mode = <&tcsr 0x13000>; + }; + }; + camnoc_virt: interconnect-0 { compatible = "qcom,qcs615-camnoc-virt"; #interconnect-cells = <2>;
Add the SCM node for QCS615 platform. It is an interface to communicate to the secure firmware. Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)