From patchwork Mon Oct 28 20:24:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Petrous via B4 Relay X-Patchwork-Id: 13854069 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38BBB1EE009; Mon, 28 Oct 2024 20:25:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730147129; cv=none; b=fZxT+Uu6qS6OULZtyuZLnfCWMaD/si5UbjCFJyRtWDpv9yrmyxVcomrqFEM4b9CIQOzGsXAQciP6lEingsPiOsxMPRtVFo3dubpE4RMZpmsPZhEg+b7go9zEcbhnDMKICVULEyv7CFrKhJAOzX21yWgtf1yyoxs7qYTac7CZuIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730147129; c=relaxed/simple; bh=GkMDbekZjB413spSTR0VjgfWteczHDggEgGysKXOZNM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TyFOZrGRK7SntoZ/rLNjoM3MRYzTV9ZZYeT1O2Qne48iopp6aMwbKQ6nOr5x3U/3epTEP0Feugq0XWaE0H5XyhIvXZO+kvT5G7ZqR8TF5eVZDCZwmwhWf7WNAwI5u0si66LjwKHAZLVJpchcXJ56u2Ad4OIitouXrloTRUO1cJ8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mXiL75m+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mXiL75m+" Received: by smtp.kernel.org (Postfix) with ESMTPS id 01E3BC4CEE7; Mon, 28 Oct 2024 20:25:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730147129; bh=GkMDbekZjB413spSTR0VjgfWteczHDggEgGysKXOZNM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mXiL75m+E7K8jMEWIDyuSqebPihtWwF+37c9GSBFVphIYJPXs7Hls4umuBzGO8xyp oOrUAycEYWUGuIovCuxndtWC8li5P5iTkne29rKP4C2cQrbnP2JmOXfXvSDLrl7i3b 3aM0ScUt04nmfnsv395mwpuXHtoLucOqQXN1mH20WZty17vT1Rs/0vSAdWE3Rh4Sy4 48lTbgc5FcKseURg5PFklQ+RZPNOuctBxBKDdjHsM9MhCXQhF49QgwkFt0Z1+WQp+1 WdJDX47zBffGlkj9cWvRsPxi9irNqLwVln3pi0+I+FNGlDOud17aF0d8fDKRZw1bwZ y0GSB/mArNVPw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3279D5B154; Mon, 28 Oct 2024 20:25:28 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Mon, 28 Oct 2024 21:24:58 +0100 Subject: [PATCH v4 16/16] net: stmmac: dwmac-s32: Read PTP clock rate when ready Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-upstream_s32cc_gmac-v4-16-03618f10e3e2@oss.nxp.com> References: <20241028-upstream_s32cc_gmac-v4-0-03618f10e3e2@oss.nxp.com> In-Reply-To: <20241028-upstream_s32cc_gmac-v4-0-03618f10e3e2@oss.nxp.com> To: Maxime Coquelin , Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vinod Koul , Richard Cochran , Andrew Lunn , Heiner Kallweit , Russell King , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Emil Renner Berthing , Minda Chen , Nicolas Ferre , Claudiu Beznea , Iyappan Subramanian , Keyur Chudgar , Quan Nguyen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, NXP S32 Linux Team , "Jan Petrous (OSS)" , Andrei Botila , Jacob Keller X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730147124; l=1605; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=LsZsEsLk0S5TfmlHZCV6HTyBWNimPqjm1epTUQoYEEY=; b=UQ0dGVjkzm5GF1d8SPLrApbJm5eP1wcEFzCOmIZsO2S6Axeju/ihEdVNgR5Ymfi+y/1JYAjtu 8gaokdVXYkrAPmWNLUbafaETbKpSQPUHkt0TuYOSgaxtqsEpslpq/0U X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" Reply-To: jan.petrous@oss.nxp.com From: "Jan Petrous (OSS)" The PTP clock is read by stmmac_platform during DT parse. On S32G/R the clock is not ready and returns 0. Postpone reading of the clock on PTP init. Co-developed-by: Andrei Botila Signed-off-by: Andrei Botila Signed-off-by: Jan Petrous (OSS) Reviewed-by: Jacob Keller --- drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c index fba221c37594..da2cdcfd0529 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c @@ -140,6 +140,18 @@ static void s32_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode) dev_err(gmac->dev, "Can't set tx clock\n"); } +static void s32_dwmac_ptp_clk_freq_config(struct stmmac_priv *priv) +{ + struct plat_stmmacenet_data *plat = priv->plat; + + if (!plat->clk_ptp_ref) + return; + + plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); + + netdev_dbg(priv->dev, "PTP rate %lu\n", plat->clk_ptp_rate); +} + static int s32_dwmac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat; @@ -195,6 +207,7 @@ static int s32_dwmac_probe(struct platform_device *pdev) plat->init = s32_gmac_init; plat->exit = s32_gmac_exit; plat->fix_mac_speed = s32_fix_mac_speed; + plat->ptp_clk_freq_config = s32_dwmac_ptp_clk_freq_config; plat->bsp_priv = gmac;