| Message ID | 20241030105347.2117034-7-quic_vikramsa@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | media: qcom: camss: Add sc7280 support | expand |
On 10/30/24 12:53, Vikram Sharma wrote: > The Vision Mezzanine for the RB3 ships with an imx577 camera sensor. > Enable the IMX577 on the vision mezzanine. > > An example media-ctl pipeline for the imx577 is: > > media-ctl --reset > media-ctl -v -V '"imx577 '19-001a'":0[fmt:SRGGB10/4056x3040 field:none]' > media-ctl -V '"msm_csiphy3":0[fmt:SRGGB10/4056x3040]' > media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]' > media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]' > media-ctl -l '"msm_csiphy3":1->"msm_csid0":0[1]' > media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' > > yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0 > > Signed-off-by: Hariram Purushothaman <quic_hariramp@quicinc.com> > Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> > Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 4 + > .../qcs6490-rb3gen2-vision-mezzanine.dtso | 73 +++++++++++++++++++ > arch/arm64/boot/dts/qcom/sc7280.dtsi | 33 +++++++++ > 3 files changed, 110 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index ac199f809b0d..186768f7c696 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -111,6 +111,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > + > +qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo > + > +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso > new file mode 100644 > index 000000000000..cd3fe65fa971 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso > @@ -0,0 +1,73 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +/* > + * Camera Sensor overlay on top of rb3gen2 core kit. > + */ > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/clock/qcom,camcc-sc7280.h> > + > +/dts-v1/; > +/plugin/; > + > +&camcc { > + status = "okay"; > +}; > + > +&camss { > + vdda-phy-supply = <&vreg_l10c_0p88>; > + vdda-pll-supply = <&vreg_l6b_1p2>; > + status = "okay"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* The port index denotes CSIPHY id i.e. csiphy3 */ > + port@3 { > + reg = <3>; > + csiphy3_ep: endpoint { > + clock-lanes = <7>; > + data-lanes = <0 1 2 3>; > + remote-endpoint = <&imx577_ep>; > + }; > + }; > + }; > +}; > + > +&cci1 { > + status = "okay"; > +}; > + > +&cci1_i2c1 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + camera@1a { > + compatible = "sony,imx577"; > + reg = <0x1a>; > + > + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default", "suspend"; > + pinctrl-0 = <&cam2_default>; > + pinctrl-1 = <&cam2_suspend>; > + > + clocks = <&camcc CAM_CC_MCLK3_CLK>; > + assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>; > + assigned-clock-rates = <24000000>; > + > + dovdd-supply = <&vreg_l18b_1p8>; > + > + port { > + imx577_ep: endpoint { > + clock-lanes = <7>; > + link-frequencies = /bits/ 64 <600000000>; > + data-lanes = <0 1 2 3>; > + remote-endpoint = <&csiphy3_ep>; > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 690051708dec..8130c1374722 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -5115,6 +5115,39 @@ tlmm: pinctrl@f100000 { > gpio-ranges = <&tlmm 0 0 175>; > wakeup-parent = <&pdc>; > > + cam2_default: cam2-default-state { > + rst-pins { > + pins = "gpio78"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + mclk-pins { > + pins = "gpio67"; > + function = "cam_mclk"; > + drive-strength = <2>; > + bias-disable; > + }; > + }; SoC-specific change of adding new pin functions into the platform dtsi file shall be separated from the rest of the mezzanine board change, send it as its own change, you may wish add all MCLK pins at once. And the camera sensor reset "gpio" pin goes into the mezzanine specific change. > + > + cam2_suspend: cam2-suspend-state { > + rst-pins { > + pins = "gpio78"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-down; > + output-low; > + }; > + > + mclk-pins { > + pins = "gpio67"; > + function = "cam_mclk"; > + drive-strength = <2>; > + bias-pull-down; > + }; > + }; > + Same as above. > cci0_default: cci0-default-state { > pins = "gpio69", "gpio70"; > function = "cci_i2c"; -- Best wishes, Vladimir
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index ac199f809b0d..186768f7c696 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -111,6 +111,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb + +qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo + +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso new file mode 100644 index 000000000000..cd3fe65fa971 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/* + * Camera Sensor overlay on top of rb3gen2 core kit. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/qcom,camcc-sc7280.h> + +/dts-v1/; +/plugin/; + +&camcc { + status = "okay"; +}; + +&camss { + vdda-phy-supply = <&vreg_l10c_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* The port index denotes CSIPHY id i.e. csiphy3 */ + port@3 { + reg = <3>; + csiphy3_ep: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&imx577_ep>; + }; + }; + }; +}; + +&cci1 { + status = "okay"; +}; + +&cci1_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + camera@1a { + compatible = "sony,imx577"; + reg = <0x1a>; + + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "suspend"; + pinctrl-0 = <&cam2_default>; + pinctrl-1 = <&cam2_suspend>; + + clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clock-rates = <24000000>; + + dovdd-supply = <&vreg_l18b_1p8>; + + port { + imx577_ep: endpoint { + clock-lanes = <7>; + link-frequencies = /bits/ 64 <600000000>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&csiphy3_ep>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 690051708dec..8130c1374722 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -5115,6 +5115,39 @@ tlmm: pinctrl@f100000 { gpio-ranges = <&tlmm 0 0 175>; wakeup-parent = <&pdc>; + cam2_default: cam2-default-state { + rst-pins { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + mclk-pins { + pins = "gpio67"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + }; + + cam2_suspend: cam2-suspend-state { + rst-pins { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + + mclk-pins { + pins = "gpio67"; + function = "cam_mclk"; + drive-strength = <2>; + bias-pull-down; + }; + }; + cci0_default: cci0-default-state { pins = "gpio69", "gpio70"; function = "cci_i2c";