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Fri, 1 Nov 2024 06:45:44 GMT Received: from jingyw-gv.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 31 Oct 2024 23:45:41 -0700 From: Jingyi Wang Date: Fri, 1 Nov 2024 14:44:46 +0800 Subject: [PATCH] arm64: dts: qcom: qcs8300: Add PMU support for QCS8300 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241101-qcs8300_pmu-v1-1-3f3d744a3482@quicinc.com> X-B4-Tracking: v=1; b=H4sIAN54JGcC/0XMUQrCMBBF0a2UfBvIpElMuxWRkk4mOmCrNrUIp Xs3KujnffDOKjJNTFm01SomWjjzdSwBu0rgOYwnkhxLC620AVAg75h9rVR3Gx4SXQKrdUiOGlE et4kSPz/a4fjtie6Pgs7f8W+21VtUjbY/kUeeOVy6OGeWFByYRMbWBtpFv/U+ZJJ4HQae2yoSl q8NoD1BgzYh1n3swcPexr1XjUF02kRx3LYX9aZvAeUAAAA= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Jingyi Wang X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; 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Signed-off-by: Jingyi Wang Reviewed-by: Konrad Dybcio --- This patch depends on below patch series: https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/ - Reviewed --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) --- base-commit: dec9255a128e19c5fcc3bdb18175d78094cc624d change-id: 20241101-qcs8300_pmu-c6f1522af6e9 prerequisite-change-id: 20240925-qcs8300_initial_dtsi-ea614fe45341:v2 prerequisite-patch-id: 73c78f31fa1d504124d4a82b578a6a14126cccd8 prerequisite-patch-id: 5a01283c8654ae7c696d9c69cb21505b71c5ca27 prerequisite-patch-id: dc633d5aaac790776a8a213ea2faa4890a3f665d prerequisite-patch-id: 9ecf4cb8b5842ac64e51d6baa0e6c1fbe449ee66 Best regards, diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 2c35f96c3f28..b716c0791b3d 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -302,6 +302,16 @@ mc_virt: interconnect-1 { qcom,bcm-voters = <&apps_bcm_voter>; }; + pmu-a55 { + compatible = "arm,cortex-a55-pmu"; + interrupts = ; + }; + + pmu-a78 { + compatible = "arm,cortex-a78-pmu"; + interrupts = ; + }; + psci { compatible = "arm,psci-1.0"; method = "smc";