| Message ID | 20241112002807.2804021-3-quic_molvera@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | clks: qcom: Introduce clks for SM8750 | expand |
On Mon, Nov 11, 2024 at 04:28:02PM -0800, Melody Olvera wrote: > From: Taniya Das <quic_tdas@quicinc.com> > > Add the RPMH clocks present in SM8750 SoC and fix the match table to > sort it alphabetically. > > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > Signed-off-by: Taniya Das <quic_tdas@quicinc.com> > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > drivers/clk/qcom/clk-rpmh.c | 28 +++++++++++++++++++++++++++- > 1 file changed, 27 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c > index eefc322ce367..a3b381e34e48 100644 > --- a/drivers/clk/qcom/clk-rpmh.c > +++ b/drivers/clk/qcom/clk-rpmh.c > @@ -368,6 +368,10 @@ DEFINE_CLK_RPMH_VRM(rf_clk2, _d, "rfclkd2", 1); > DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1); > DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1); > > +DEFINE_CLK_RPMH_VRM(rf_clk3, _a2, "rfclka3", 2); > +DEFINE_CLK_RPMH_VRM(rf_clk4, _a2, "rfclka4", 2); > +DEFINE_CLK_RPMH_VRM(rf_clk5, _a2, "rfclka5", 2); Are the two last clocks defined "for the future platforms"? > + > DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1); > DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1); > DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1); > @@ -807,6 +811,27 @@ static const struct clk_rpmh_desc clk_rpmh_x1e80100 = { > .num_clks = ARRAY_SIZE(x1e80100_rpmh_clocks), > }; > > +static struct clk_hw *sm8750_rpmh_clocks[] = { > + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, > + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, > + [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw, > + [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw, > + [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw, > + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw, > + [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, > + [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, > + [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, > + [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, > + [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a2.hw, > + [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a2_ao.hw, > + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, > +}; > + > +static const struct clk_rpmh_desc clk_rpmh_sm8750 = { > + .clks = sm8750_rpmh_clocks, > + .num_clks = ARRAY_SIZE(sm8750_rpmh_clocks), > +}; > + > static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, > void *data) > { > @@ -894,6 +919,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { > { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, > { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, > { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, > + { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, > { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, > { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, > { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, > @@ -909,7 +935,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { > { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, > { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, > { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, > - { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, Please don't mix fixes and actual code. I'd suggest splitting sc7280 move to the separate commit. > + { .compatible = "qcom,sm8750-rpmh-clk", .data = &clk_rpmh_sm8750}, > { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100}, > { } > }; > -- > 2.46.1 >
On 11/15/2024 7:31 AM, Dmitry Baryshkov wrote: > On Mon, Nov 11, 2024 at 04:28:02PM -0800, Melody Olvera wrote: >> From: Taniya Das <quic_tdas@quicinc.com> >> >> Add the RPMH clocks present in SM8750 SoC and fix the match table to >> sort it alphabetically. >> >> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> >> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >> --- >> drivers/clk/qcom/clk-rpmh.c | 28 +++++++++++++++++++++++++++- >> 1 file changed, 27 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c >> index eefc322ce367..a3b381e34e48 100644 >> --- a/drivers/clk/qcom/clk-rpmh.c >> +++ b/drivers/clk/qcom/clk-rpmh.c >> @@ -368,6 +368,10 @@ DEFINE_CLK_RPMH_VRM(rf_clk2, _d, "rfclkd2", 1); >> DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1); >> DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1); >> >> +DEFINE_CLK_RPMH_VRM(rf_clk3, _a2, "rfclka3", 2); >> +DEFINE_CLK_RPMH_VRM(rf_clk4, _a2, "rfclka4", 2); >> +DEFINE_CLK_RPMH_VRM(rf_clk5, _a2, "rfclka5", 2); > Are the two last clocks defined "for the future platforms"? I'm unsure; I'll let Taniya comment. > >> + >> DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1); >> DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1); >> DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1); >> @@ -807,6 +811,27 @@ static const struct clk_rpmh_desc clk_rpmh_x1e80100 = { >> .num_clks = ARRAY_SIZE(x1e80100_rpmh_clocks), >> }; >> >> +static struct clk_hw *sm8750_rpmh_clocks[] = { >> + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, >> + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, >> + [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw, >> + [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw, >> + [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw, >> + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw, >> + [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, >> + [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, >> + [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, >> + [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, >> + [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a2.hw, >> + [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a2_ao.hw, >> + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, >> +}; >> + >> +static const struct clk_rpmh_desc clk_rpmh_sm8750 = { >> + .clks = sm8750_rpmh_clocks, >> + .num_clks = ARRAY_SIZE(sm8750_rpmh_clocks), >> +}; >> + >> static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, >> void *data) >> { >> @@ -894,6 +919,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { >> { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, >> { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, >> { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, >> + { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, >> { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, >> { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, >> { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, >> @@ -909,7 +935,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { >> { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, >> { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, >> { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, >> - { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, > Please don't mix fixes and actual code. I'd suggest splitting sc7280 > move to the separate commit. Bryan O'Donoghue requested we sort these as part of this patch. I don't feel strongly either way, but clear guidance here would be appreciated. Thanks, Melody > >> + { .compatible = "qcom,sm8750-rpmh-clk", .data = &clk_rpmh_sm8750}, >> { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100}, >> { } >> }; >> -- >> 2.46.1 >>
On Mon, Nov 18, 2024 at 10:53:16AM -0800, Melody Olvera wrote: > On 11/15/2024 7:31 AM, Dmitry Baryshkov wrote: > > On Mon, Nov 11, 2024 at 04:28:02PM -0800, Melody Olvera wrote: > > > From: Taniya Das <quic_tdas@quicinc.com> [...] > > > @@ -894,6 +919,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { > > > { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, > > > { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, > > > { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, > > > + { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, > > > { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, > > > { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, > > > { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, > > > @@ -909,7 +935,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { > > > { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, > > > { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, > > > { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, > > > - { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, > > Please don't mix fixes and actual code. I'd suggest splitting sc7280 > > move to the separate commit. > > Bryan O'Donoghue requested we sort these as part of this patch. I don't feel > strongly either way, > but clear guidance here would be appreciated. I don't see v1 of this patch on the linux-arm-msm list (hint: use b4 tool to send patches), so I can not comment on what Bryan ment. But I'd definitely say, moving of the sc7280 entry is a _separate_ commit. > > Thanks, > Melody > > > > > > + { .compatible = "qcom,sm8750-rpmh-clk", .data = &clk_rpmh_sm8750}, > > > { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100}, > > > { } > > > }; > > > -- > > > 2.46.1 > > > >
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index eefc322ce367..a3b381e34e48 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -368,6 +368,10 @@ DEFINE_CLK_RPMH_VRM(rf_clk2, _d, "rfclkd2", 1); DEFINE_CLK_RPMH_VRM(rf_clk3, _d, "rfclkd3", 1); DEFINE_CLK_RPMH_VRM(rf_clk4, _d, "rfclkd4", 1); +DEFINE_CLK_RPMH_VRM(rf_clk3, _a2, "rfclka3", 2); +DEFINE_CLK_RPMH_VRM(rf_clk4, _a2, "rfclka4", 2); +DEFINE_CLK_RPMH_VRM(rf_clk5, _a2, "rfclka5", 2); + DEFINE_CLK_RPMH_VRM(clk1, _a1, "clka1", 1); DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1); DEFINE_CLK_RPMH_VRM(clk3, _a1, "clka3", 1); @@ -807,6 +811,27 @@ static const struct clk_rpmh_desc clk_rpmh_x1e80100 = { .num_clks = ARRAY_SIZE(x1e80100_rpmh_clocks), }; +static struct clk_hw *sm8750_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, + [RPMH_LN_BB_CLK1] = &clk_rpmh_clk6_a2.hw, + [RPMH_LN_BB_CLK1_A] = &clk_rpmh_clk6_a2_ao.hw, + [RPMH_LN_BB_CLK3] = &clk_rpmh_clk8_a2.hw, + [RPMH_LN_BB_CLK3_A] = &clk_rpmh_clk8_a2_ao.hw, + [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, + [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, + [RPMH_RF_CLK2] = &clk_rpmh_rf_clk2_a.hw, + [RPMH_RF_CLK2_A] = &clk_rpmh_rf_clk2_a_ao.hw, + [RPMH_RF_CLK3] = &clk_rpmh_rf_clk3_a2.hw, + [RPMH_RF_CLK3_A] = &clk_rpmh_rf_clk3_a2_ao.hw, + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_sm8750 = { + .clks = sm8750_rpmh_clocks, + .num_clks = ARRAY_SIZE(sm8750_rpmh_clocks), +}; + static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, void *data) { @@ -894,6 +919,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, + { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, @@ -909,7 +935,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, { .compatible = "qcom,sm8550-rpmh-clk", .data = &clk_rpmh_sm8550}, { .compatible = "qcom,sm8650-rpmh-clk", .data = &clk_rpmh_sm8650}, - { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, + { .compatible = "qcom,sm8750-rpmh-clk", .data = &clk_rpmh_sm8750}, { .compatible = "qcom,x1e80100-rpmh-clk", .data = &clk_rpmh_x1e80100}, { } };